Inventor · disambiguated record
Ramesh Narayanaswamy
Also filed as: NARAYANASWAMY RAMESH
16 granted patents·9 pending applications·93 citations·filing 2000–2025
91Inventor score
Top patents by PatentIndex Score
25 records- 0183US7548842B2Scalable system for simulation and emulation of electronic circuits using asymmetrical evaluation and canvassing instruction processorsEVE S A·Filed 2006·Granted Jun 16, 2009·18 cites·11 claims
- 0276US8359186B2Method for delay immune and accelerated evaluation of digital circuits by compiling asynchronous completion handshaking meansGANESAN SUBBU·Filed 2007·Granted Jan 22, 2013·12 cites·8 claims
- 0368US7509602B2Compact processor element for a scalable digital logic verification and emulation systemEVE S A·Filed 2006·Granted Mar 24, 2009·6 cites·3 claims
- 0468US6470480B2Tracing different states reached by a signal in a functional verification systemTHARAS SYSTEMS INC·Filed 2000·Granted Oct 22, 2002·15 cites·9 claims
- 0565US6629297B2Tracing the change of state of a signal in a functional verification systemTHARAS SYSTEMS INC·Filed 2000·Granted Sep 30, 2003·13 cites·13 claims
- 0665US2025238590A1Clock aware simulation vector processorSYNOPSYS INC·Filed 2025·Application pending·0 cites
- 0764US6691287B2Functional verification systemTHARAS SYSTEMS INC·Filed 2000·Granted Feb 10, 2004·12 cites·32 claims
- 0861US10423740B2Logic simulation and/or emulation which follows hardware semanticsRABINOVITCH ALEXANDER·Filed 2009·Granted Sep 24, 2019·2 cites·22 claims
- 0959US12265779B2Clock aware simulation vector processorSYNOPSYS INC·Filed 2021·Granted Apr 1, 2025·0 cites·14 claims
- 1059US9558306B2Retiming a design for efficient parallel simulationSYNOPSYS INC·Filed 2013·Granted Jan 31, 2017·2 cites·25 claims
- 1159US6480988B2Functional verification of both cycle-based and non-cycle based designsTHARAS SYSTEMS INC·Filed 2000·Granted Nov 12, 2002·8 cites·19 claims
- 1255US12256127B2Synchronized playback controls for parallel viewing of video contentARRIS ENTPR LLC·Filed 2022·Granted Mar 18, 2025·0 cites·18 claims
- 1355US6625786B2Run-time controller in a functional verification systemTHARAS SYSTEMS INC·Filed 2000·Granted Sep 23, 2003·5 cites·23 claims
- 1451US12153864B2Message passing multi processor network for simulation vector processingSYNOPSYS INC·Filed 2022·Granted Nov 26, 2024·0 cites·20 claims
- 1550US12368934B2Method and system for synchronizing play position between main player and companion devices and providing value added servicesARRIS ENTPR LLC·Filed 2023·Granted Jul 22, 2025·0 cites·18 claims
- 1650US10853544B2Selective execution for partitioned parallel simulationsSYNOPSYS INC·Filed 2017·Granted Dec 1, 2020·0 cites·28 claims
- 1745US2022394074A1System and method for fault-tolerant playback of stored digital contentARRIS ENTPR LLC·Filed 2022·Application pending·0 cites
- 1844US2024323469A1Dynamic supplemental content for recorded contentARRIS ENTPR LLC·Filed 2022·Application pending·0 cites
- 1943US2013290919A1Selective execution for partitioned parallel simulationsSYNOPSYS INC·Filed 2012·Application pending·0 cites
- 2042US2024406493A1Method and system for realizing fast channel change feature with androidARRIS ENTPR LLC·Filed 2021·Application pending·0 cites
- 2142US2006277428A1A system and method for simulation of electronic circuits generating clocks and delaying the execution of instructions in a plurality of processorsTHARAS SYSTEMS INC·Filed 2006·Application pending·0 cites
- 2242US2007044079A1A system and method for compiling a description of an electronic circuit to instructions adapted to execute on a plurality of processorsTHARAS SYSTEMS INC·Filed 2006·Application pending·0 cites
- 2341US2006277020A1A reconfigurable system for verification of electronic circuits using high-speed serial links to connect asymmetrical evaluation and canvassing instruction processorsTHARAS SYSTEMS·Filed 2006·Application pending·0 cites
- 2440US2023020848A1Method and system for advertisement on demandARRIS ENTPR LLC·Filed 2022·Application pending·0 cites
- 2538US9507896B2Quasi-dynamic scheduling and dynamic scheduling for efficient parallel simulationSYNOPSYS INC·Filed 2013·Granted Nov 29, 2016·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →