Inventor · disambiguated record
Kirk D. Lamb
Also filed as: LAMB KIRK D · LAMB KIRK DAVID
15 granted patents·4 pending applications·392 citations·filing 1992–2020
93Inventor score
Top patents by PatentIndex Score
19 records- 0197US6807650B2DDR-II driver impedance adjustment control algorithm and interface circuitsIBM·Filed 2002·Granted Oct 19, 2004·195 cites·9 claims
- 0289US6662136B2Digital temperature sensor (DTS) system to monitor temperature in a memory subsystemIBM·Filed 2001·Granted Dec 9, 2003·62 cites·4 claims
- 0386US7624225B2System and method for providing synchronous dynamic random access memory (SDRAM) mode register shadowing in a memory systemIBM·Filed 2007·Granted Nov 24, 2009·18 cites·20 claims
- 0484US11301215B2Real time configuration of multiple true random number generator sources for optimized entropy generationIBM·Filed 2020·Granted Apr 12, 2022·2 cites·18 claims
- 0584US9436612B2Sizing a write cache buffer based on emergency data save parametersIBM·Filed 2016·Granted Sep 6, 2016·3 cites·1 claims
- 0684US6757857B2Alternating current built in self test (AC BIST) with variable data receiver voltage reference for performing high-speed AC memory subsystem self-testIBM·Filed 2001·Granted Jun 29, 2004·38 cites·6 claims
- 0776US6515917B2Digital-to-analog converter (dac) for dynamic adjustment of off-chip driver pull-up and pull down impedance by providing a variable reference voltage to high frequency receiver and driver circuits for commercial memoryIBM·Filed 2001·Granted Feb 4, 2003·25 cites·3 claims
- 0875US10007611B2Sizing a write cache buffer based on emergency data save parametersIBM·Filed 2017·Granted Jun 26, 2018·1 cites·1 claims
- 0974US8661382B2Modeling for soft error specificationLAMB KIRK DAVID·Filed 2009·Granted Feb 25, 2014·9 cites·17 claims
- 1073US9767030B2Sizing a write cache buffer based on emergency data save parametersIBM·Filed 2016·Granted Sep 19, 2017·1 cites·1 claims
- 1168US6489912B2Analog-to-digital converter for monitoring VDDQ and dynamically updating programmable Vref when using high-frequency receiver and driver circuits for commercial memoryIBM·Filed 2001·Granted Dec 3, 2002·17 cites·8 claims
- 1265US6874105B2Operation graph based event monitoring systemIBM·Filed 2001·Granted Mar 29, 2005·12 cites·20 claims
- 1356US2015317248A1Sizing a write cache buffer based on emergency data save parametersIBM·Filed 2014·Application pending·0 cites
- 1451US7290159B2Fixed latency data computation and chip crossing circuits and methods for synchronous input to output protocol translator supporting multiple reference oscillator frequenciesIBM·Filed 2004·Granted Oct 30, 2007·2 cites·20 claims
- 1546US7830737B2SMI memory read data capture margin characterization circuits and methodsIBM·Filed 2008·Granted Nov 9, 2010·1 cites·16 claims
- 1641US2008307374A1Method, system, and computer program product for mapping a logical design onto an integrated circuit with slack apportionmentIBM·Filed 2007·Application pending·0 cites
- 1738US2009249174A1Fault Tolerant Self-Correcting Non-Glitching Low Power Circuit for Static and Dynamic Data StorageIBM·Filed 2008·Application pending·0 cites
- 1834US5282210ATime-division-multiplexed data transmission systemIBM·Filed 1992·Granted Jan 25, 1994·6 cites·5 claims
- 1934US2006164909A1System, method and storage medium for providing programmable delay chains for a memory systemIBM·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →