Sizing a write cache buffer based on emergency data save parameters

Abstract

Embodiments relate to saving data upon loss of power. An aspect includes sizing a write cache buffer based on parameters related to carrying out this emergency data save procedure. A computer implemented method for allocating a write cache on a storage controller includes retrieving, at run-time by a processor, one or more operating parameters of a component used in a power-loss save of the write cache. The component is selected from the group consisting of an energy storage element, a non-volatile memory, and a transfer logic. A size for the write cache on the storage controller is determined, based on the one or more operating parameters. A write cache, of the determined size, is allocated from a volatile memory coupled to the storage controller.

1 . A computer program product for allocating a write cache on a storage controller, the computer program product comprising:
 a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a signal, the program instructions readable by a processing circuit to cause the processing circuit to perform a method comprising:
 retrieving, at run-time, one or more operating parameters of a component used in a power-loss save of the write cache, the component selected from the group consisting of an energy storage element, a non-volatile memory, and a transfer logic; 
 determining a size for the write cache on the storage controller, based on the one or more operating parameters; and 
 allocating the write cache, of the determined size, from a volatile memory coupled to the storage controller. 
   
     
     
         2 . The computer program product of  claim 1 , wherein the component corresponds to the transfer logic and the one or more operating parameters corresponds to a power consumption of the transfer logic. 
     
     
         3 . The computer program product of  claim 1 , wherein the component corresponds to the transfer logic and the one or more operating parameters corresponds to a process speed of the transfer logic. 
     
     
         4 . The computer program product of  claim 3 , wherein the process speed is retrieved as bin data. 
     
     
         5 . The computer program product of  claim 3 , wherein the determining a size for the write cache on the storage controller is based on an energy consumption rate of the transfer logic, and further comprising:
 determining a voltage of the transfer logic from the process speed; and   calculating the energy consumption rate of the transfer logic from the determined voltage and the process speed.   
     
     
         6 . The computer program product of  claim 5 , wherein the calculating of the energy consumption rate also uses a current temperature of the transfer logic. 
     
     
         7 . The computer program product of  claim 1 , wherein the component corresponds to the energy storage element and the one or more operating parameters corresponds to an energy capacity of the energy storage element. 
     
     
         8 . The computer program product of  claim 1 , wherein the component corresponds to the non-volatile memory and the one or more operating parameters corresponds to a data transfer rate of the non-volatile memory. 
     
     
         9 . A computer implemented method for allocating a write cache on a storage controller, the method comprising:
 retrieving, at run-time by a processor, one or more operating parameters of a component used in a power-loss save of the write cache, the component selected from the group consisting of an energy storage element, a non-volatile memory, and a transfer logic;   determining a size for the write cache on the storage controller, based on the one or more operating parameters; and   allocating the write cache, of the determined size, from a volatile memory coupled to the storage controller.   
     
     
         10 . The computer implemented method of  claim 9 , wherein the component corresponds to the transfer logic and the one or more operating parameters corresponds to a power consumption of the transfer logic. 
     
     
         11 . The computer implemented method of  claim 9 , wherein the component corresponds to the transfer logic and the one or more operating parameters corresponds to a process speed of the transfer logic. 
     
     
         12 . The computer implemented method of  claim 11 , wherein the process speed is stored on the transfer logic as bin data. 
     
     
         13 . The computer implemented method of  claim 11 , wherein the determining a size for the write cache on the storage controller is based on an energy consumption rate of the transfer logic, and further comprising:
 determining a voltage of the transfer logic from the process speed; and   calculating the energy consumption rate of the transfer logic from the determined voltage and the process speed.   
     
     
         14 . The computer implemented method of  claim 13 , wherein the calculating of the energy consumption rate accounts for multiple voltage domains of the storage controller. 
     
     
         15 . The computer implemented method of  claim 13 , wherein the calculating of the energy consumption rate accounts for multiple frequency domains of the storage controller. 
     
     
         16 . A storage controller device, the storage controller device comprising:
 a volatile memory;   a non-volatile storage;   transfer logic configured to copy, upon a power loss, contents of a write cache in the volatile memory to the non-volatile storage   an instruction memory; and   a processor, communicatively coupled to said instruction memory, the storage controller configured to perform a method comprising:
 determining an energy consumption rate of the transfer logic during the copy upon power loss, wherein the determining of the energy consumption rate is based on one or more operating parameters of the transfer logic that are obtained at run-time; 
 determining a size for the write cache in the volatile memory, based on the energy consumption rate and an amount of energy in an energy storage element that powers the power-loss save; and 
 allocating the write cache, of the determined size, from the volatile memory. 
   
     
     
         17 . The storage controller device of  claim 16 , wherein the component corresponds to the transfer logic and the one or more operating parameters corresponds to a process speed of the transfer logic. 
     
     
         18 . The storage controller device of  claim 17 , wherein the determining a size for the write cache on the storage controller is based on an energy consumption rate of the transfer logic, and further comprising:
 determining a voltage of the transfer logic from the process speed; and   calculating the energy consumption rate of the transfer logic from the determined voltage and the process speed.   
     
     
         19 . The storage controller device of  claim 16 , further comprising an application specific integrated circuit (ASIC), wherein the transfer logic resides on the ASIC. 
     
     
         20 . The storage controller device of  claim 16 , wherein the retrieving comprises reading the one or more operating parameters from a stored system configuration.