Inventor · disambiguated record
Lakshmi N. Reddy
Also filed as: REDDY LAKSHMI · REDDY LAKSHMI N · REDDY LAKSHMI NARASIMHA
45 granted patents·1 pending application·146 citations·filing 1994–2023
97Inventor score
Top patents by PatentIndex Score
46 records- 0189US10417375B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2017·Granted Sep 17, 2019·5 cites·14 claims
- 0286US10558775B2Memory element graph-based placement in integrated circuit designIBM·Filed 2017·Granted Feb 11, 2020·4 cites·17 claims
- 0386US8881089B1Physical synthesis optimization with fast metric checkIBM·Filed 2013·Granted Nov 4, 2014·11 cites·14 claims
- 0483US12423502B2Rule check heatmap predictionIBM·Filed 2022·Granted Sep 23, 2025·1 cites·20 claims
- 0582US11314920B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2020·Granted Apr 26, 2022·1 cites·20 claims
- 0682US9703920B2Intra-run design decision process for circuit synthesisIBM·Filed 2015·Granted Jul 11, 2017·3 cites·12 claims
- 0777US7451416B2Method and system for designing an electronic circuitIBM·Filed 2006·Granted Nov 11, 2008·7 cites·7 claims
- 0877US7047163B1Method and apparatus for applying fine-grained transforms during placement synthesis interactionIBM·Filed 2000·Granted May 16, 2006·25 cites·12 claims
- 0973US10078722B2Dynamic microprocessor gate design tool for area/timing margin controlIBM·Filed 2016·Granted Sep 18, 2018·2 cites·18 claims
- 1073US9443048B2Physical aware technology mapping in synthesisIBM·Filed 2014·Granted Sep 13, 2016·2 cites·8 claims
- 1173US8584070B2Evaluating routing congestion based on average global edge congestion histogramsALPERT CHARLES J·Filed 2011·Granted Nov 12, 2013·3 cites·24 claims
- 1268US7900182B2Method and system for designing an electronic circuitIBM·Filed 2008·Granted Mar 1, 2011·3 cites·18 claims
- 1366US10977419B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2019·Granted Apr 13, 2021·0 cites·20 claims
- 1466US10503841B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2019·Granted Dec 10, 2019·0 cites·20 claims
- 1566US10496764B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2019·Granted Dec 3, 2019·0 cites·20 claims
- 1666US9514265B2Congestion aware layer promotionIBM·Filed 2014·Granted Dec 6, 2016·1 cites·6 claims
- 1766US9495502B2Congestion aware layer promotionIBM·Filed 2014·Granted Nov 15, 2016·1 cites·11 claims
- 1865US10831979B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
- 1964US8966422B1Median line based critical timing path optimizationIBM·Filed 2014·Granted Feb 24, 2015·1 cites·18 claims
- 2063US11080443B2Memory element graph-based placement in integrated circuit designIBM·Filed 2019·Granted Aug 3, 2021·0 cites·13 claims
- 2162US10372836B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2017·Granted Aug 6, 2019·0 cites·19 claims
- 2262US10372837B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2018·Granted Aug 6, 2019·0 cites·1 claims
- 2361US10346558B2Integrated circuit buffering solutions considering sink delaysIBM·Filed 2017·Granted Jul 9, 2019·0 cites·20 claims
- 2461US8407652B2Task-based multi-process design synthesisDRUMM ANTHONY D·Filed 2010·Granted Mar 26, 2013·1 cites·23 claims
- 2560US10534891B2Time-driven placement and/or cloning of components for an integrated circuitIBM·Filed 2017·Granted Jan 14, 2020·0 cites·6 claims
- 2659US8341565B2Task-based multi-process design synthesis with reproducible transformsDRUMM ANTHONY D·Filed 2010·Granted Dec 25, 2012·1 cites·23 claims
- 2758US11636245B2Methods and systems for leveraging computer-aided design variability in synthesis tuningIBM·Filed 2021·Granted Apr 25, 2023·0 cites·21 claims
- 2858US10229238B2Congestion aware layer promotionIBM·Filed 2016·Granted Mar 12, 2019·0 cites·4 claims
- 2958US9443047B2Physical aware technology mapping in synthesisIBM·Filed 2014·Granted Sep 13, 2016·0 cites·16 claims
- 3057US12124789B2Multi-stage electronic design automation parameter tuningIBM·Filed 2021·Granted Oct 22, 2024·0 cites·20 claims
- 3157US9715565B2Physical aware technology mapping in synthesisIBM·Filed 2016·Granted Jul 25, 2017·0 cites·7 claims
- 3257US9710585B2Physical aware technology mapping in synthesisIBM·Filed 2016·Granted Jul 18, 2017·0 cites·14 claims
- 3356US6460166B1System and method for restructuring of logic circuitryIBM·Filed 1998·Granted Oct 1, 2002·30 cites·8 claims
- 3455US2025124202A1Verifying multi-cycle interconnect synthesis optimization in automatically generated physical hierarchy chip designIBM·Filed 2023·Application pending·0 cites
- 3554US10671791B2Dynamic microprocessor gate design tool for area/timing margin controlIBM·Filed 2018·Granted Jun 2, 2020·0 cites·18 claims
- 3653US9690900B2Intra-run design decision process for circuit synthesisIBM·Filed 2015·Granted Jun 27, 2017·0 cites·8 claims
- 3753US8677304B2Task-based multi-process design synthesisIBM·Filed 2013·Granted Mar 18, 2014·0 cites·25 claims
- 3851US9672321B2Virtual positive slack in physical synthesisIBM·Filed 2015·Granted Jun 6, 2017·0 cites·12 claims
- 3951US9672322B2Virtual positive slack in physical synthesisIBM·Filed 2015·Granted Jun 6, 2017·0 cites·6 claims
- 4049US11983477B2Routing layer re-optimization in physical synthesisIBM·Filed 2021·Granted May 14, 2024·0 cites·18 claims
- 4148US5784290AMulti-chip device partitioning processIBM·Filed 1997·Granted Jul 21, 1998·17 cites·12 claims
- 4247US11074379B2Multi-cycle latch tree synthesisIBM·Filed 2019·Granted Jul 27, 2021·0 cites·20 claims
- 4345US6282695B1System and method for restructuring of logic circuitryIBM·Filed 1998·Granted Aug 28, 2001·16 cites·21 claims
- 4442US10216882B2Critical path straightening system based on free-space aware and timing driven incremental placementIBM·Filed 2016·Granted Feb 26, 2019·0 cites·17 claims
- 4542US6339835B1Pseudo-anding in dynamic logic circuitsIBM·Filed 1999·Granted Jan 15, 2002·6 cites·28 claims
- 4634US5675500AMulti-chip device partitioning processIBM·Filed 1994·Granted Oct 7, 1997·5 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →