Inventor · disambiguated record
Sathish Veeraraghavan
Also filed as: VEERARAGHAVAN SATHISH
15 granted patents·83 citations·filing 2009–2019
92Inventor score
Top patents by PatentIndex Score
15 records- 0191US10401279B2Process-induced distortion prediction and feedforward and feedback correction of overlay errorsKLA TENCOR CORP·Filed 2014·Granted Sep 3, 2019·10 cites·25 claims
- 0291US10025894B2System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chuckingKLA TENCOR CORP·Filed 2016·Granted Jul 17, 2018·7 cites·19 claims
- 0390US9430593B2System and method to emulate finite element model based prediction of in-plane distortions due to semiconductor wafer chuckingKLA TENCOR CORP·Filed 2013·Granted Aug 30, 2016·10 cites·36 claims
- 0489US9354526B2Overlay and semiconductor process control using a wafer geometry metricVUKKADALA PRADEEP·Filed 2012·Granted May 31, 2016·15 cites·37 claims
- 0589US8768665B2Site based quantification of substrate topography and its relation to lithography defocus and overlayVEERARAGHAVAN SATHISH·Filed 2010·Granted Jul 1, 2014·13 cites·21 claims
- 0688US9865047B1Systems and methods for effective pattern wafer surface measurement and analysis using interferometry toolKLA TENCOR CORP·Filed 2015·Granted Jan 9, 2018·7 cites·29 claims
- 0785US9546862B2Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry toolKLA TENCOR CORP·Filed 2012·Granted Jan 17, 2017·6 cites·14 claims
- 0883US10249523B2Overlay and semiconductor process control using a wafer geometry metricKLA TENCOR CORP·Filed 2016·Granted Apr 2, 2019·3 cites·10 claims
- 0978US10379061B1Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry toolKLA TENCOR CORP·Filed 2017·Granted Aug 13, 2019·2 cites·14 claims
- 1074US9029810B2Using wafer geometry to improve scanner correction effectiveness for overlay controlKLA TENCOR CORP·Filed 2014·Granted May 12, 2015·2 cites·20 claims
- 1172US8065109B2Localized substrate geometry characterizationVEERARAGHAVAN SATHISH·Filed 2009·Granted Nov 22, 2011·5 cites·49 claims
- 1267US9513565B2Using wafer geometry to improve scanner correction effectiveness for overlay controlKLA TENCOR CORP·Filed 2015·Granted Dec 6, 2016·1 cites·19 claims
- 1361US11761880B2Process-induced distortion prediction and feedforward and feedback correction of overlay errorsKLA TENCOR CORP·Filed 2019·Granted Sep 19, 2023·0 cites·20 claims
- 1461US10509329B2Breakdown analysis of geometry induced overlay and utilization of breakdown analysis for improved overlay controlKLA TENCOR CORP·Filed 2015·Granted Dec 17, 2019·1 cites·26 claims
- 1561US9558545B2Predicting and controlling critical dimension issues and pattern defectivity in wafers using interferometryKLA TENCOR CORP·Filed 2015·Granted Jan 31, 2017·1 cites·22 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →