Inventor · disambiguated record
Srinivasan Iyengar
Also filed as: IYENGAR SRINIVASAN · IYENGAR SRINIVASAN R
8 granted patents·143 citations·filing 1998–2022
87Inventor score
Files withJAIN PRASHANT3CADENCE DESIGN SYSTEMS INC2CHETPUT CHANDRASHEKAR L1MICROSOFT TECHNOLOGY LICENSING LLC1S3 INC1
Top patents by PatentIndex Score
8 records- 0192US8516196B2Resource sharing to reduce implementation costs in a multicore processorJAIN PRASHANT·Filed 2012·Granted Aug 20, 2013·39 cites·20 claims
- 0284US8195883B2Resource sharing to reduce implementation costs in a multicore processorJAIN PRASHANT·Filed 2010·Granted Jun 5, 2012·11 cites·20 claims
- 0384US7797659B2Analog/digital partitioning of circuit designs for simulationCADENCE DESIGN SYSTEMS INC·Filed 2007·Granted Sep 14, 2010·13 cites·11 claims
- 0482US6389566B1Edge-triggered scan flip-flop and one-pass scan synthesis methodologyS3 INC·Filed 1998·Granted May 14, 2002·57 cites·27 claims
- 0578US8145848B2Processor and method for writeback buffer reuseJAIN PRASHANT·Filed 2009·Granted Mar 27, 2012·13 cites·20 claims
- 0675US8448116B2Analog/digital partitioning of circuit designs for simulationCHETPUT CHANDRASHEKAR L·Filed 2010·Granted May 21, 2013·4 cites·5 claims
- 0770US7979262B1Method for verifying connectivity of electrical circuit componentsCADENCE DESIGN SYSTEMS INC·Filed 2006·Granted Jul 12, 2011·6 cites·50 claims
- 0858US12276953B2Multi-market resource dispatch optimizationMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2022·Granted Apr 15, 2025·0 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →