Inventor · disambiguated record
Kevin Lee Baker
Also filed as: BAKER KEVIN · BAKER KEVIN L · Baker Kevin Lee
13 granted patents·4 pending applications·21 citations·filing 2015–2025
87Inventor score
Top patents by PatentIndex Score
17 records- 0191US9704923B1Dual-layer dielectric in memory deviceINTEL CORP·Filed 2015·Granted Jul 11, 2017·6 cites·8 claims
- 0290US10629652B2Dual-layer dielectric in memory deviceINTEL CORP·Filed 2018·Granted Apr 21, 2020·5 cites·27 claims
- 0388US11121317B2Low resistance crosspoint architectureMICRON TECHNOLOGY INC·Filed 2019·Granted Sep 14, 2021·6 cites·8 claims
- 0485US10134809B2Dual-layer dielectric in memory deviceINTEL CORP·Filed 2017·Granted Nov 20, 2018·3 cites·7 claims
- 0582US11735473B2Methods for forming memory devices, and associated devices and systemsMICRON TECHNOLOGY INC·Filed 2021·Granted Aug 22, 2023·1 cites·20 claims
- 0678US12082425B2Efficient fabrication of memory structuresMICRON TECHNOLOGY INC·Filed 2023·Granted Sep 3, 2024·0 cites·19 claims
- 0778US2025048652A1Efficient fabrication of memory structuresMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 0876US2025280546A1Integrated Circuitry, Array of Cross-Point Memory Cells, Method Used in Forming Integrated CircuitryMICRON TECHNOLOGY INC·Filed 2025·Application pending·0 cites
- 0972US2024224825A1Low resistance crosspoint architectureMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 1071US11778837B2Memory with optimized resistive layersMICRON TECHNOLOGY INC·Filed 2022·Granted Oct 3, 2023·0 cites·20 claims
- 1168US11882774B2Low resistance crosspoint architectureMICRON TECHNOLOGY INC·Filed 2021·Granted Jan 23, 2024·0 cites·6 claims
- 1267US11626452B2Efficient fabrication of memory structuresMICRON TECHNOLOGY INC·Filed 2020·Granted Apr 11, 2023·0 cites·13 claims
- 1363US11380732B2Memory with optimized resistive layersMICRON TECHNOLOGY INC·Filed 2020·Granted Jul 5, 2022·0 cites·20 claims
- 1462US2021296582A1Dielectric barrier at non-volatile memory tile edgeINTEL CORP·Filed 2021·Application pending·0 cites
- 1560US12342549B2Integrated circuitry, array of cross-point memory cells, method used in forming integrated circuitryMICRON TECHNOLOGY INC·Filed 2022·Granted Jun 24, 2025·0 cites·17 claims
- 1660US11201083B2Methods for forming memory devices, and associated devices and systemsMICRON TECHNOLOGY INC·Filed 2020·Granted Dec 14, 2021·0 cites·11 claims
- 1759US11069855B2Dielectric barrier at non-volatile memory tile edgeINTEL CORP·Filed 2019·Granted Jul 20, 2021·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →