Inventor · disambiguated record
Thilo Schaffroth
Also filed as: SCHAFFROTH THILO
16 granted patents·1 pending application·67 citations·filing 1997–2008
91Inventor score
Top patents by PatentIndex Score
17 records- 0178US8914589B2Multi-port DRAM architecture for accessing different memory partitionsGREGORIUS PETER·Filed 2008·Granted Dec 16, 2014·10 cites·33 claims
- 0271US8495310B2Method and system including plural memory controllers and a memory access control bus for accessing a memory deviceGREGORIUS PETER·Filed 2008·Granted Jul 23, 2013·6 cites·28 claims
- 0363US6370069B2Method for testing a multiplicity of word lines of a semiconductor memory configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Apr 9, 2002·13 cites·6 claims
- 0444US6734695B2Method and semiconductor component having a device for determining an internal voltageINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 11, 2004·2 cites·7 claims
- 0543US6754110B2Evaluation circuit for a DRAMINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jun 22, 2004·4 cites·7 claims
- 0642US6097233AAdjustable delay circuitSIEMENS AG·Filed 1999·Granted Aug 1, 2000·7 cites·7 claims
- 0741US6675322B1Integrated circuit having a self-test deviceSIEMENS AG·Filed 1999·Granted Jan 6, 2004·9 cites·6 claims
- 0839US7728648B2Semiconductor device chip, semiconductor device system, and methodQIMONDA AG·Filed 2008·Granted Jun 1, 2010·0 cites·11 claims
- 0938US6449206B2Semiconductor circuit configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Sep 10, 2002·2 cites·15 claims
- 1037US5995436AApparatus for controlling circuit response during power-upSIEMENS AG·Filed 1998·Granted Nov 30, 1999·5 cites·14 claims
- 1136US7165198B2System for testing an integrated circuit using multiple test modesINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jan 16, 2007·0 cites·23 claims
- 1236US6313656B1Method of testing leakage current at a contact-making point in an integrated circuit by determining a potential at the contact-making pointSIEMENS AG·Filed 1999·Granted Nov 6, 2001·6 cites·8 claims
- 1335US2007247944A1Integrated Semiconductor Memory with Refreshing of Memory CellsQIMONDA AG·Filed 2007·Application pending·0 cites
- 1433US5881013AApparatus for controlling circuit response during power-upSIEMENS AG·Filed 1997·Granted Mar 9, 1999·3 cites·1 claims
- 1532US6603699B2Configuration for fuse initializationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Aug 5, 2003·0 cites·8 claims
- 1631US6628156B2Integrated circuit having a timing circuit, and method for adjustment of an output signal from the timing circuitINFINEON TECHNOLOGIES AG·Filed 2001·Granted Sep 30, 2003·0 cites·9 claims
- 1730US6507528B2Circuit configuration for generating sense amplifier control signalsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jan 14, 2003·0 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →