Inventor · disambiguated record
Michael D. Steigerwalt
Also filed as: STEIGERWALT MICHAEL · STEIGERWALT MICHAEL D
16 granted patents·3 pending applications·457 citations·filing 2001–2017
94Inventor score
Top patents by PatentIndex Score
19 records- 0198US7118986B2STI formation in semiconductor device including SOI and bulk silicon regionsIBM·Filed 2004·Granted Oct 10, 2006·258 cites·26 claims
- 0288US7485537B2Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thicknessIBM·Filed 2006·Granted Feb 3, 2009·12 cites·1 claims
- 0386US7911024B2Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereofIBM·Filed 2010·Granted Mar 22, 2011·6 cites·4 claims
- 0486US6440807B1Surface engineering to prevent EPI growth on gate poly during selective EPI processingIBM·Filed 2001·Granted Aug 27, 2002·31 cites·20 claims
- 0585US7691716B2Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operationIBM·Filed 2008·Granted Apr 6, 2010·10 cites·5 claims
- 0685US6964897B2SOI trench capacitor cell incorporating a low-leakage floating body array transistorIBM·Filed 2003·Granted Nov 15, 2005·50 cites·25 claims
- 0783US8232186B2Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structureHARLEY ERIC C T·Filed 2008·Granted Jul 31, 2012·13 cites·16 claims
- 0882US8222673B2Self-aligned embedded SiGe structure and method of manufacturing the sameGREENE BRIAN J·Filed 2010·Granted Jul 17, 2012·5 cites·11 claims
- 0980US8598009B2Self-aligned embedded SiGe structure and method of manufacturing the sameGREENE BRIAN J·Filed 2012·Granted Dec 3, 2013·4 cites·20 claims
- 1078US7375410B2Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereofIBM·Filed 2004·Granted May 20, 2008·17 cites·14 claims
- 1176US7115965B2Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operationIBM·Filed 2004·Granted Oct 3, 2006·16 cites·14 claims
- 1275US7763518B2Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereofIBM·Filed 2008·Granted Jul 27, 2010·4 cites·17 claims
- 1371US7394131B2STI formation in semiconductor device including SOI and bulk silicon regionsIBM·Filed 2006·Granted Jul 1, 2008·4 cites·3 claims
- 1471US7115463B2Patterning SOI with silicon mask to create box at different depthsIBM·Filed 2004·Granted Oct 3, 2006·16 cites·20 claims
- 1570US6900092B2Surface engineering to prevent epi growth on gate poly during selective epi processingIBM·Filed 2002·Granted May 31, 2005·11 cites·17 claims
- 1652US2008132025A1Ultra-thin soi vertical bipolar transistors with an inversion collector on thin-buried oxide (box) for low substrate-bias operation and methods thereofIBM·Filed 2007·Application pending·0 cites
- 1742US2012228716A1METHODS OF INTEGRATING REVERSE eSiGe ON NFET AND SiGe CHANNEL ON PFET, AND RELATED STRUCTUREHARLEY ERIC C T·Filed 2012·Application pending·0 cites
- 1839US6995094B2Method for deep trench etching through a buried insulator layerIBM·Filed 2003·Granted Feb 7, 2006·0 cites·16 claims
- 1938US2018197734A1Buffer layer to inhibit wormholes in semiconductor fabricationGLOBALFOUNDRIES INC·Filed 2017·Application pending·0 cites
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