Inventor · disambiguated record
John Paul Edwards
Also filed as: EDWARDS JOHN P · EDWARDS JOHN PAUL
9 granted patents·2 pending applications·59 citations·filing 2011–2017
86Inventor score
Technology areasH10P
Top patents by PatentIndex Score
11 records- 0195US8633094B2GaN high voltage HFET with passivation plus gate dielectric multilayer structureRAMDANI JAMAL·Filed 2011·Granted Jan 21, 2014·29 cites·23 claims
- 0292US8507947B2High quality GaN high-voltage HFETS on siliconRAMDANI JAMAL·Filed 2011·Granted Aug 13, 2013·12 cites·9 claims
- 0391US8928037B2Heterostructure power transistor with AlSiN passivation layerPOWER INTEGRATIONS INC·Filed 2013·Granted Jan 6, 2015·10 cites·23 claims
- 0485US8703561B2High quality GaN high-voltage HFETs on siliconPOWER INTEGRATIONS INC·Filed 2013·Granted Apr 22, 2014·4 cites·13 claims
- 0577US9147734B2High quality GaN high-voltage HFETs on siliconPOWER INTEGRATIONS INC·Filed 2014·Granted Sep 29, 2015·2 cites·6 claims
- 0673US10446676B2Heterostructure power transistor with AlSiN passivation layerPOWER INTEGRATIONS INC·Filed 2017·Granted Oct 15, 2019·1 cites·8 claims
- 0768US9761704B2Heterostructure power transistor with AlSiN passivation layerPOWER INTEGRATIONS INC·Filed 2014·Granted Sep 12, 2017·1 cites·27 claims
- 0857US9437688B2High-quality GaN high-voltage HFETs on siliconPOWER INTEGRATIONS INC·Filed 2015·Granted Sep 6, 2016·0 cites·7 claims
- 0955US9343541B2Method of fabricating GaN high voltage HFET with passivation plus gate dielectric multilayer structurePOWER INTEGRATIONS INC·Filed 2014·Granted May 17, 2016·0 cites·15 claims
- 1050US2013330888A1In situ grown gate dielectric and field plate dielectricPOWER INTEGRATIONS INC·Filed 2013·Application pending·0 cites
- 1147US2013146943A1In situ grown gate dielectric and field plate dielectricEDWARDS JOHN P·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →