Inventor · disambiguated record
Giorgio De Santi
Also filed as: DE SANTI GIORGIO
7 granted patents·2 pending applications·135 citations·filing 1985–2005
87Inventor score
Top patents by PatentIndex Score
9 records- 0177US4703552AFabricating a CMOS transistor having low threshold voltages using self-aligned silicide polysilicon gates and silicide interconnect regionsSGS MICROELETTRONICA SPA·Filed 1985·Granted Nov 3, 1987·35 cites·5 claims
- 0271US6946673B2Integrated resistor, phase-change memory element including this resistor, and process for the fabrication thereofOVONYX INC·Filed 2003·Granted Sep 20, 2005·17 cites·20 claims
- 0363US6187683B1Method for final passivation of integrated circuitSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Feb 13, 2001·28 cites·14 claims
- 0460US6888225B2Process of final passivation of an integrated circuit deviceST MICROELECTRONICS SRL·Filed 2002·Granted May 3, 2005·6 cites·10 claims
- 0558US5543633AProcess and structure for measuring the planarity degree of a dielectric layer in an integrated circuit and integrated circuit including means for performing said processSGS THOMSON MICROELECTRONICS·Filed 1993·Granted Aug 6, 1996·19 cites·16 claims
- 0647US6087729ALow dielectric constant composite film for integrated circuits of an inorganic aerogel and an organic filler grafted to the inorganic materialSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Jul 11, 2000·14 cites·9 claims
- 0746US4718977AProcess for forming semiconductor device having multi-thickness metallizationSGS MICROELETTRONICA SPA·Filed 1985·Granted Jan 12, 1988·16 cites·3 claims
- 0836US2005269667A1Process for manufacturing integrated resistor and phase-change memory element including this resistorOVONYX INC·Filed 2005·Application pending·0 cites
- 0927US2001001727A1Process of final passivation of an integrated circuit deviceFiled 1998·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →