Inventor · disambiguated record
George M. Braceras
Also filed as: BRACERAS GEORGE M · BRACERAS GEORGE MARIA
60 granted patents·4 pending applications·822 citations·filing 1986–2019
99Inventor score
Top patents by PatentIndex Score
64 records- 0195US8279687B2Single supply sub VDD bit-line precharge SRAM and method for level shiftingADAMS CHAD A·Filed 2010·Granted Oct 2, 2012·31 cites·20 claims
- 0294US9236116B1Memory cells with read access schemesIBM·Filed 2015·Granted Jan 12, 2016·24 cites·20 claims
- 0394US8233342B2Apparatus and method for implementing write assist for static random access memory arraysADAMS CHAD A·Filed 2008·Granted Jul 31, 2012·43 cites·20 claims
- 0494US7643357B2System and method for integrating dynamic leakage reduction with write-assisted SRAM architectureIBM·Filed 2008·Granted Jan 5, 2010·40 cites·20 claims
- 0593US9548104B1Boost control to improve SRAM write operationIBM·Filed 2015·Granted Jan 17, 2017·15 cites·20 claims
- 0692US9570156B1Data aware write scheme for SRAMGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 14, 2017·21 cites·20 claims
- 0792US7408800B1Apparatus and method for improved SRAM device performance through double gate topologyIBM·Filed 2007·Granted Aug 5, 2008·25 cites·3 claims
- 0891US7904658B2Structure for power-efficient cache memoryIBM·Filed 2007·Granted Mar 8, 2011·27 cites·21 claims
- 0989US6509778B2BIST circuit for variable impedance systemIBM·Filed 2001·Granted Jan 21, 2003·43 cites·14 claims
- 1084US8233337B2SRAM delay circuit that tracks bitcell characteristicsARSOVSKI IGOR·Filed 2009·Granted Jul 31, 2012·14 cites·25 claims
- 1184US7613050B2Sense-amplifier assist (SAA) with power-reduction techniqueIBM·Filed 2007·Granted Nov 3, 2009·15 cites·4 claims
- 1283US8630139B2Dual power supply memory array having a control circuit that dynamically selects a lower of two supply voltages for bitline pre-charge operations and an associated methodBRACERAS GEORGE M·Filed 2011·Granted Jan 14, 2014·9 cites·13 claims
- 1382US7817481B2Column selectable self-biasing virtual voltages for SRAM write assistIBM·Filed 2008·Granted Oct 19, 2010·13 cites·14 claims
- 1481US4709162AOff-chip driver circuitsIBM·Filed 1986·Granted Nov 24, 1987·27 cites·17 claims
- 1578US7729159B2Apparatus for improved SRAM device performance through double gate topologyIBM·Filed 2008·Granted Jun 1, 2010·9 cites·17 claims
- 1677US6897674B2Adaptive integrated circuit based on transistor current measurementsIBM·Filed 2003·Granted May 24, 2005·16 cites·30 claims
- 1776US9437282B1High performance sense amplifierGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 6, 2016·4 cites·20 claims
- 1876US6829183B2Active restore weak write test modeIBM·Filed 2003·Granted Dec 7, 2004·19 cites·4 claims
- 1975US10510384B2Intracycle bitline restore in high performance memoryGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 17, 2019·3 cites·13 claims
- 2074US7573300B2Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating sameIBM·Filed 2007·Granted Aug 11, 2009·7 cites·2 claims
- 2173US9390769B1Sense amplifiers and multiplexed latchesGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 12, 2016·4 cites·20 claims
- 2272US8839054B2Read only memory (ROM) with redundancyBRACERAS GEORGE M·Filed 2012·Granted Sep 16, 2014·4 cites·13 claims
- 2371US9460811B2Read only memory (ROM) with redundancyIBM·Filed 2014·Granted Oct 4, 2016·2 cites·8 claims
- 2471US8582351B2Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stabilityARSOVSKI IGOR·Filed 2010·Granted Nov 12, 2013·4 cites·19 claims
- 2571US7061793B2Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devicesIBM·Filed 2004·Granted Jun 13, 2006·15 cites·6 claims
- 2671US5793592ADynamic dielectric protection circuit for a receiverIBM·Filed 1997·Granted Aug 11, 1998·25 cites·15 claims
- 2770US6999547B2Delay-lock-loop with improved accuracy and rangeIBM·Filed 2002·Granted Feb 14, 2006·16 cites·20 claims
- 2869US9570155B2Circuit to improve SRAM stabilityIBM·Filed 2015·Granted Feb 14, 2017·3 cites·3 claims
- 2968US10522217B1Column-dependent positive voltage boost for memory cell supply voltageGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 31, 2019·2 cites·20 claims
- 3068US6711076B2Active restore weak write test modeIBM·Filed 2002·Granted Mar 23, 2004·13 cites·5 claims
- 3167US7894291B2Circuit and method for controlling a standby voltage level of a memoryIBM·Filed 2005·Granted Feb 22, 2011·6 cites·20 claims
- 3267US7471114B2Design structure for a current control mechanism for power networks and dynamic logic keeper circuitsIBM·Filed 2007·Granted Dec 30, 2008·5 cites·17 claims
- 3367US7120732B2Content addressable memory structureIBM·Filed 2004·Granted Oct 10, 2006·12 cites·22 claims
- 3466US7307457B2Apparatus for implementing dynamic data path with interlocked keeper and restore devicesIBM·Filed 2006·Granted Dec 11, 2007·6 cites·6 claims
- 3566US6967861B2Method and apparatus for improving cycle time in a quad data rate SRAM deviceIBM·Filed 2004·Granted Nov 22, 2005·14 cites·34 claims
- 3665US6922076B2Scalable terminationIBM·Filed 2003·Granted Jul 26, 2005·13 cites·21 claims
- 3765US5561781APort swapping for improved virtual SRAM performance and processing of concurrent processor access requestsIBM·Filed 1995·Granted Oct 1, 1996·42 cites·2 claims
- 3864US6038181AEfficient semiconductor burn-in circuit and method of operationIBM·Filed 1998·Granted Mar 14, 2000·28 cites·10 claims
- 3964US5929667AMethod and apparatus for protecting circuits subjected to high voltageIBM·Filed 1997·Granted Jul 27, 1999·19 cites·15 claims
- 4062US8654594B2Vdiff max limiter in SRAMs for improved yield and powerARSOVSKI IGOR·Filed 2012·Granted Feb 18, 2014·2 cites·20 claims
- 4159US6542418B2Redundant memory array having dual-use repair elementsIBM·Filed 2001·Granted Apr 1, 2003·10 cites·20 claims
- 4258US10978143B2Multi-port high performance memoryMARVELL INT LTD·Filed 2019·Granted Apr 13, 2021·1 cites·25 claims
- 4357US6650580B1Method for margin testingIBM·Filed 2002·Granted Nov 18, 2003·9 cites·6 claims
- 4457US5557768AFunctional pipelined virtual multiport cache memory with plural access during a single cycleIBM·Filed 1995·Granted Sep 17, 1996·33 cites·18 claims
- 4555US7180320B2Adaptive integrated circuit based on transistor current measurementsIBM·Filed 2004·Granted Feb 20, 2007·5 cites·27 claims
- 4654US5638315AContent addressable memory for a data processing systemIBM·Filed 1995·Granted Jun 10, 1997·15 cites·20 claims
- 4753US6441646B1Structure and method of alternating precharge in dynamic SOI circuitsIBM·Filed 2001·Granted Aug 27, 2002·6 cites·11 claims
- 4853US5751648ATwo stage sensing for large static memory arraysIBM·Filed 1997·Granted May 12, 1998·14 cites·4 claims
- 4951US6501293B2Method and apparatus for programmable active termination of input/output devicesIBM·Filed 1999·Granted Dec 31, 2002·27 cites·2 claims
- 5049US5815354AReceiver input voltage protection circuitIBM·Filed 1997·Granted Sep 29, 1998·16 cites·16 claims
Showing the top 50 of 64 patent records by PatentIndex Score.
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