Assignee
ARSOVSKI IGOR
US·16 granted patents·3 pending applications·158 citations·filing 2006–2012
Top patents by PatentIndex Score
19 records- 0195US8117567B2Structure for implementing memory array device with built in computation capabilityARSOVSKI IGOR·Filed 2008·Granted Feb 14, 2012·36 cites·17 claims
- 0291US8793365B2Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodesARSOVSKI IGOR·Filed 2009·Granted Jul 29, 2014·26 cites·28 claims
- 0391US8233302B2Content addressable memory with concurrent read and search/compare operations at the same memory cellARSOVSKI IGOR·Filed 2011·Granted Jul 31, 2012·14 cites·9 claims
- 0490US8525546B1Majority dominant power scheme for repeated structures and structures thereofARSOVSKI IGOR·Filed 2012·Granted Sep 3, 2013·11 cites·25 claims
- 0589US8228713B2SRAM having wordline up-level voltage adjustable to assist bitcell stability and design structure for sameARSOVSKI IGOR·Filed 2010·Granted Jul 24, 2012·13 cites·25 claims
- 0684US8233337B2SRAM delay circuit that tracks bitcell characteristicsARSOVSKI IGOR·Filed 2009·Granted Jul 31, 2012·14 cites·25 claims
- 0784US8077534B2Adaptive noise suppression using a noise look-up tableARSOVSKI IGOR·Filed 2008·Granted Dec 13, 2011·13 cites·20 claims
- 0875US8130525B2Method and apparatus for configuring a content-addressable memory (CAM) design as binary CAM or ternary CAMARSOVSKI IGOR·Filed 2009·Granted Mar 6, 2012·9 cites·19 claims
- 0973US8214699B2Circuit structure and method for digital integrated circuit performance screeningARSOVSKI IGOR·Filed 2008·Granted Jul 3, 2012·6 cites·20 claims
- 1071US8582351B2Methods and systems for adjusting wordline up-level voltage to improve production yield relative to SRAM-cell stabilityARSOVSKI IGOR·Filed 2010·Granted Nov 12, 2013·4 cites·19 claims
- 1167US9384835B2Content addressable memory early-predict late-correct single ended sensingARSOVSKI IGOR·Filed 2012·Granted Jul 5, 2016·3 cites·24 claims
- 1264US8218378B2Word-line level shift circuitARSOVSKI IGOR·Filed 2009·Granted Jul 10, 2012·5 cites·18 claims
- 1362US8654594B2Vdiff max limiter in SRAMs for improved yield and powerARSOVSKI IGOR·Filed 2012·Granted Feb 18, 2014·2 cites·20 claims
- 1459US8437201B2Word-line level shift circuitARSOVSKI IGOR·Filed 2012·Granted May 7, 2013·2 cites·9 claims
- 1547US8302037B2Skewed double differential pair circuit for offset cancellationARSOVSKI IGOR·Filed 2009·Granted Oct 30, 2012·0 cites·5 claims
- 1642US8521500B2Method and device for measuring integrated circuit power supply noise and calibration of power supply noise analysis modelsARSOVSKI IGOR·Filed 2010·Granted Aug 27, 2013·0 cites·33 claims
- 1737US2009099828A1Device Threshold Calibration Through State Dependent BurninARSOVSKI IGOR·Filed 2007·Application pending·0 cites
- 1836US2008253042A1E-fuse and methodARSOVSKI IGOR·Filed 2007·Application pending·0 cites
- 1934US2008046789A1Apparatus and method for testing memory devices and circuits in integrated circuitsARSOVSKI IGOR·Filed 2006·Application pending·0 cites
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