Inventor · disambiguated record
Nisha Ananthakrishnan
Also filed as: ANANTHAKRISHNAN NISHA
22 granted patents·14 pending applications·47 citations·filing 2007–2025
92Inventor score
Top patents by PatentIndex Score
36 records- 0192US8916981B2Epoxy-amine underfill materials for semiconductor packagesXIU YONGHAO·Filed 2013·Granted Dec 23, 2014·31 cites·25 claims
- 0288US2025329604A1Microelectronics package comprising a package-on-package (pop) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zoneINTEL CORP·Filed 2025·Application pending·0 cites
- 0384US12417958B2Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and PoP adhesive keep out zoneINTEL CORP·Filed 2023·Granted Sep 16, 2025·0 cites·14 claims
- 0483US12347743B2Microelectronics package comprising a package-on-package (PoP) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zoneINTEL CORP·Filed 2023·Granted Jul 1, 2025·0 cites·20 claims
- 0581US9068067B2Flexible underfill compositions for enhanced reliabilityXU DINGYING·Filed 2010·Granted Jun 30, 2015·3 cites·10 claims
- 0681US2024014097A1Microelectronics package comprising a package-on-package (pop) architecture with inkjet barrier material for controlling bondline thickness and pop adhesive keep out zoneINTEL CORP·Filed 2023·Application pending·0 cites
- 0778US11282717B2Micro-electronic package with substrate protrusion to facilitate dispense of underfill between a narrow die-to-die gapINTEL CORP·Filed 2018·Granted Mar 22, 2022·2 cites·12 claims
- 0869US11776821B2Micro-electronic package with substrate protrusion to facilitate dispense of underfill between a narrow die-to-die gapINTEL CORP·Filed 2022·Granted Oct 3, 2023·0 cites·19 claims
- 0969US8900919B2Robust ink formulations for durable markings on microelectronic packages and its extendibility as a barrier material for thermal and sealant materialsINTEL CORP·Filed 2013·Granted Dec 2, 2014·2 cites·19 claims
- 1068US9431274B2Method for reducing underfill filler settling in integrated circuit packagesINTEL CORP·Filed 2012·Granted Aug 30, 2016·2 cites·7 claims
- 1168US9330993B2Methods of promoting adhesion between underfill and conductive bumps and structures formed therebyBAI YIQUN·Filed 2012·Granted May 3, 2016·3 cites·20 claims
- 1265US12315777B2Microelectronics package comprising a package-on-package (POP) architecture with inkjet barrier material for controlling bondline thickness and POP adhesive keep out zoneINTEL CORP·Filed 2019·Granted May 27, 2025·0 cites·23 claims
- 1365US9631065B2Methods of forming wafer level underfill materials and structures formed therebyINTEL CORP·Filed 2013·Granted Apr 25, 2017·1 cites·42 claims
- 1465US9611372B2Narrow-gap flip chip underfill compositionINTEL CORP·Filed 2016·Granted Apr 4, 2017·1 cites·20 claims
- 1563US9269596B2Narrow-gap flip chip underfill compositionINTEL CORP·Filed 2013·Granted Feb 23, 2016·1 cites·20 claims
- 1662US9458283B2Flexible underfill compositions for enhanced reliabilityINTEL CORP·Filed 2015·Granted Oct 4, 2016·0 cites·20 claims
- 1756US9640415B2Robust ink formulations for durable markings on microelectronic packages and its extendibility as a barrier material for thermal and sealant materialsINTEL CORP·Filed 2014·Granted May 2, 2017·0 cites·14 claims
- 1856US9504168B2Fluxing-encapsulant material for microelectronic packages assembled via thermal compression bonding processNAGARAJAN SIVAKUMAR·Filed 2011·Granted Nov 22, 2016·1 cites·12 claims
- 1955US2024222326A1Package architecture with memory chips having different process regionsINTEL CORP·Filed 2022·Application pending·0 cites
- 2055US2024222321A1Package architecture with memory chips having different process regionsINTEL CORP·Filed 2022·Application pending·0 cites
- 2155US2024222328A1Package architecture with memory chips having different process regionsINTEL CORP·Filed 2022·Application pending·0 cites
- 2251US2024222274A1Hybrid integration of back-end-of-line layers for disaggregated technologiesINTEL CORP·Filed 2022·Application pending·0 cites
- 2350US10115606B2Methods of promoting adhesion between underfill and conductive bumps and structures formed therebyINTEL CORP·Filed 2016·Granted Oct 30, 2018·0 cites·23 claims
- 2449US11804470B2Wafer level passive heat spreader interposer to enable improved thermal solution for stacked dies in multi-chips package and warpage controlINTEL CORP·Filed 2019·Granted Oct 31, 2023·0 cites·20 claims
- 2548US2019099776A1Compressible media applicator, application system and methods for sameHACKENBERG KEN P·Filed 2017·Application pending·0 cites
- 2645US2016343591A1Reduction of underfill filler settling in integrated circuit packagesINTEL CORP·Filed 2016·Application pending·0 cites
- 2744US7759780B2Microelectronic package with wear resistant coatingINTEL CORP·Filed 2008·Granted Jul 20, 2010·0 cites·17 claims
- 2843US2021242102A1Underfill material for integrated circuit (ic) packageINTEL CORP·Filed 2020·Application pending·0 cites
- 2941US9704767B1Mold compound with reinforced fibersINTEL CORP·Filed 2015·Granted Jul 11, 2017·0 cites·20 claims
- 3040US2009170247A1Magnetic particles for low temperature cure of underfillSHEKHAWAT LINDA A·Filed 2007·Application pending·0 cites
- 3140US2017042043A1Fluxing-encapsulant material for microelectronic packages assembled via thermal compression bonding processNAGARAJAN SIVAKUMAR·Filed 2016·Application pending·0 cites
- 3238US2020126887A1Thin line dam on underfill material to contain thermal interface materialsINTEL CORP·Filed 2018·Application pending·0 cites
- 3337US8895365B2Techniques and configurations for surface treatment of an integrated circuit substrateRAMALINGAM SURIYAKALA·Filed 2012·Granted Nov 25, 2014·0 cites·10 claims
- 3437US2019099777A1Compressible media applicator, application system and methods for sameINTEL CORP·Filed 2017·Application pending·0 cites
- 3535US2018286704A1Processes and methods for applying underfill to singulated dieINTEL CORP·Filed 2017·Application pending·0 cites
- 3633US10475715B2Two material high K thermal encapsulant systemINTEL CORP·Filed 2015·Granted Nov 12, 2019·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →