Inventor · disambiguated record
Byung Joon Han
Also filed as: HAN BYUNG J · HAN BYUNG JOON
73 granted patents·15 pending applications·3,331 citations·filing 1994–2025
99Inventor score
Files withSTATS CHIPPAC LTD24STATS CHIPPAC PTE LTD12SILICON BOX PTE LTD10ST ASSEMBLY TEST SERVICES LTD8AMKOR TECHNOLOGY INC5
Top patents by PatentIndex Score
88 records- 0199US7364945B2Method of mounting an integrated circuit package in an encapsulant cavitySTATS CHIPPAC LTD·Filed 2006·Granted Apr 29, 2008·100 cites·13 claims
- 0299US6861288B2Stacked semiconductor packages and method for the fabrication thereofST ASSEMBLY TEST SERVICES LTD·Filed 2003·Granted Mar 1, 2005·308 cites·8 claims
- 0398US7435619B2Method of fabricating a 3-D package stacking systemSTATS CHIPPAC LTD·Filed 2006·Granted Oct 14, 2008·75 cites·20 claims
- 0498US7429787B2Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sidesSTATS CHIPPAC LTD·Filed 2006·Granted Sep 30, 2008·88 cites·17 claims
- 0598US7372141B2Semiconductor stacked package assembly having exposed substrate surfaces on upper and lower sidesSTATS CHIPPAC LTD·Filed 2006·Granted May 13, 2008·109 cites·24 claims
- 0698US5646828AThin packaging of multi-chip modules with enhanced thermal/power managementLUCENT TECHNOLOGIES INC·Filed 1996·Granted Jul 8, 1997·359 cites·5 claims
- 0798US5608262APackaging multi-chip modules without wire-bond interconnectionLUCENT TECHNOLOGIES INC·Filed 1995·Granted Mar 4, 1997·449 cites·15 claims
- 0897US8309397B2Integrated circuit packaging system with a component in an encapsulant cavity and method of fabrication thereofSHIM IL KWON·Filed 2011·Granted Nov 13, 2012·26 cites·10 claims
- 0996US7309913B2Stacked semiconductor packagesST ASSEMBLY TEST SERVICES LTD·Filed 2004·Granted Dec 18, 2007·94 cites·8 claims
- 1096US5866939ALead end grid array semiconductor packageANAM SEMICONDUCTOR INC·Filed 1996·Granted Feb 2, 1999·358 cites·56 claims
- 1195US8378476B2Integrated circuit packaging system with stacking option and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2010·Granted Feb 19, 2013·31 cites·20 claims
- 1295US7733661B2Chip carrier and fabrication methodSTATS CHIPPAC LTD·Filed 2009·Granted Jun 8, 2010·27 cites·14 claims
- 1394US9704824B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC LTD·Filed 2013·Granted Jul 11, 2017·10 cites·5 claims
- 1494US8643163B2Integrated circuit package-on-package stacking system and method of manufacture thereofSHIM IL KWON·Filed 2009·Granted Feb 4, 2014·35 cites·20 claims
- 1594US5473512AElectronic device package having electronic device boonded, at a localized region thereof, to circuit boardAT & T CORP·Filed 1994·Granted Dec 5, 1995·170 cites·29 claims
- 1693US11488933B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC PTE LTD·Filed 2020·Granted Nov 1, 2022·2 cites·24 claims
- 1793US6414396B1Package for stacked integrated circuitsAMKOR TECHNOLOGY INC·Filed 2000·Granted Jul 2, 2002·85 cites·23 claims
- 1892US9754897B2Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuitsSTATS CHIPPAC LTD·Filed 2015·Granted Sep 5, 2017·8 cites·20 claims
- 1991US10388612B2Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuitsSTATS CHIPPAC PTE LTD·Filed 2017·Granted Aug 20, 2019·6 cites·21 claims
- 2091US8021924B2Encapsulant cavity integrated circuit package system and method of fabrication thereofSTATS CHIPPAC LTD·Filed 2010·Granted Sep 20, 2011·9 cites·12 claims
- 2191US7855100B2Integrated circuit package system with an encapsulant cavity and method of fabrication thereofSTATS CHIPPAC LTD·Filed 2008·Granted Dec 21, 2010·15 cites·16 claims
- 2290US8163600B2Bridge stack integrated circuit package-on-package systemCHOW SENG GUAN·Filed 2006·Granted Apr 24, 2012·20 cites·14 claims
- 2390US6462274B1Chip-scale semiconductor package of the fan-out type and method of manufacturing such packagesAMKOR TECHNOLOGY INC·Filed 1999·Granted Oct 8, 2002·127 cites·43 claims
- 2489US8395251B2Integrated circuit package to package stacking systemSHIM IL KWON·Filed 2006·Granted Mar 12, 2013·18 cites·14 claims
- 2589US7732907B2Integrated circuit package system with edge connection systemSTATS CHIPPAC LTD·Filed 2006·Granted Jun 8, 2010·16 cites·20 claims
- 2689US7518224B2Offset integrated circuit package-on-package stacking systemSTATS CHIPPAC LTD·Filed 2006·Granted Apr 14, 2009·18 cites·20 claims
- 2789US6642610B2Wire bonding method and semiconductor package manufactured using the sameAMKOR TECHNOLOGY INC·Filed 2000·Granted Nov 4, 2003·51 cites·12 claims
- 2889US6150709AGrid array type lead frame having lead ends in different planesANAM SEMICONDUCTOR INC·Filed 1998·Granted Nov 21, 2000·100 cites·34 claims
- 2988US9997468B2Integrated circuit packaging system with shielding and method of manufacturing thereofSTATS CHIPPAC PTE LTD·Filed 2016·Granted Jun 12, 2018·5 cites·20 claims
- 3088US6630373B2Ground plane for exposed packageST ASSEMBLY TEST SERVICE LTD·Filed 2002·Granted Oct 7, 2003·46 cites·15 claims
- 3187US7790504B2Integrated circuit package systemSTATS CHIPPAC LTD·Filed 2006·Granted Sep 7, 2010·14 cites·20 claims
- 3287US7746656B2Offset integrated circuit package-on-package stacking systemSTATS CHIPPAC LTD·Filed 2006·Granted Jun 29, 2010·15 cites·20 claims
- 3385US8704349B2Integrated circuit package system with exposed interconnectsCHOW SENG GUAN·Filed 2006·Granted Apr 22, 2014·14 cites·8 claims
- 3485US8674516B2Integrated circuit packaging system with vertical interconnects and method of manufacture thereofHAN BYUNG JOON·Filed 2011·Granted Mar 18, 2014·8 cites·18 claims
- 3585US6858470B1Method for fabricating semiconductor packages, and leadframe assemblies for the fabrication thereofST ASSEMBLY TEST SERVICES LTD·Filed 2003·Granted Feb 22, 2005·36 cites·13 claims
- 3684US5858815ASemiconductor package and method for fabricating the sameANAM SEMICONDUCTOR INC·Filed 1996·Granted Jan 12, 1999·80 cites·13 claims
- 3783US10777528B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC PTE LTD·Filed 2017·Granted Sep 15, 2020·2 cites·21 claims
- 3883US6876069B2Ground plane for exposed packageST ASSEMBLY TEST SERVICES PTE·Filed 2003·Granted Apr 5, 2005·36 cites·17 claims
- 3982US12469819B2Semiconductor device and method of forming embedded wafer level chip scale packagesSTATS CHIPPAC PTE LTD·Filed 2022·Granted Nov 11, 2025·0 cites·20 claims
- 4082US5767447AElectronic device package enclosed by pliant medium laterally confined by a plastic rim memberLUCENT TECHNOLOGIES INC·Filed 1995·Granted Jun 16, 1998·67 cites·6 claims
- 4181US9564413B2Semiconductor device and method of forming semiconductor die with active region responsive to external stimulusHAN BYUNG JOON·Filed 2012·Granted Feb 7, 2017·5 cites·25 claims
- 4279US7064420B2Integrated circuit leadframe with ground planeST ASSEMBLY TEST SERVICES LTD·Filed 2003·Granted Jun 20, 2006·28 cites·20 claims
- 4378US8125073B2Wafer integrated with permanent carrier and method thereforHAN BYUNG JOON·Filed 2011·Granted Feb 28, 2012·4 cites·33 claims
- 4477US9934998B2Semiconductor device and method of singulating thin semiconductor wafer on carrier along modified region within non-active region formed by irradiating energySTATS CHIPPAC PTE LTD·Filed 2016·Granted Apr 3, 2018·2 cites·13 claims
- 4577US9553162B2Semiconductor device and method of forming semiconductor die with active region responsive to external stimulusSTATS CHIPPAC LTD·Filed 2013·Granted Jan 24, 2017·4 cites·13 claims
- 4677US8999754B2Integrated circuit package with molded cavityCHOW SENG GUAN·Filed 2012·Granted Apr 7, 2015·3 cites·22 claims
- 4777US7880293B2Wafer integrated with permanent carrier and method thereforSTATS CHIPPAC LTD·Filed 2008·Granted Feb 1, 2011·6 cites·25 claims
- 4877US5834160AMethod and apparatus for forming fine patterns on printed circuit boardLUCENT TECHNOLOGIES INC·Filed 1996·Granted Nov 10, 1998·44 cites·3 claims
- 4977US2023015504A1Semiconductor Device and Method of Using a Standardized Carrier to Form Embedded Wafer Level Chip Scale PackagesSTATS CHIPPAC PTE LTD·Filed 2022·Application pending·0 cites
- 5074US6020219AMethod of packaging fragile devices with a gel medium confined by a rim memberLUCENT TECHNOLOGIES INC·Filed 1997·Granted Feb 1, 2000·47 cites·5 claims
Showing the top 50 of 88 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →