Inventor · disambiguated record
Ching-San Lin
Also filed as: LIN CHING-SAN
11 granted patents·4 pending applications·157 citations·filing 1974–2013
90Inventor score
Top patents by PatentIndex Score
15 records- 0196US8004092B2Semiconductor chip with post-passivation scheme formed over passivation layerMEGICA CORP·Filed 2008·Granted Aug 23, 2011·42 cites·42 claims
- 0296US7397121B2Semiconductor chip with post-passivation scheme formed over passivation layerMEGICA CORP·Filed 2005·Granted Jul 8, 2008·49 cites·20 claims
- 0391US7547969B2Semiconductor chip with passivation layer comprising metal interconnect and contact padsMEGICA CORP·Filed 2005·Granted Jun 16, 2009·22 cites·20 claims
- 0488US8319354B2Semiconductor chip with post-passivation scheme formed over passivation layerLIN MOU-SHIUNG·Filed 2011·Granted Nov 27, 2012·8 cites·33 claims
- 0579US8518743B2Die structure and die connecting methodHSU CHIA-HUNG·Filed 2011·Granted Aug 27, 2013·8 cites·2 claims
- 0678US8242601B2Semiconductor chip with passivation layer comprising metal interconnect and contact padsCHOU CHIU-MING·Filed 2009·Granted Aug 14, 2012·7 cites·33 claims
- 0773US6802945B2Method of metal sputtering for integrated circuit metal routingMEGIC CORP·Filed 2003·Granted Oct 12, 2004·10 cites·73 claims
- 0853US8723322B2Method of metal sputtering for integrated circuit metal routingLIU HSIEN-TSUNG·Filed 2006·Granted May 13, 2014·0 cites·27 claims
- 0950US2005040033A1Method of metal sputtering for integrated circuit metal routingMEGIC CORP·Filed 2004·Application pending·0 cites
- 1049US2013249086A1Chip structure, chip bonding structure using the same, and manufacturing method thereofRAYDIUM SEMICONDUCTOR CORP·Filed 2013·Application pending·0 cites
- 1140US4004891ASuperalloys containing nitrides and process for producing sameGTE SYLVANIA INC·Filed 1975·Granted Jan 25, 1977·6 cites·1 claims
- 1240US3989559ASuperalloys containing nitrides and process for producing sameGTE SYLVANIA INC·Filed 1974·Granted Nov 2, 1976·5 cites·3 claims
- 1338US2011254152A1Chip structure, chip bonding structure using the same, and manufacturing method thereofLIN CHING-SAN·Filed 2011·Application pending·0 cites
- 1436US2012018880A1Semiconductor structure and manufacturing method thereofWU KUN-TAI·Filed 2011·Application pending·0 cites
- 1532US8617963B2Integrated circuit wafer dicing methodLIN CHING-SAN·Filed 2011·Granted Dec 31, 2013·0 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →