Inventor · disambiguated record
Seje Takaki
Also filed as: TAKAKI SEJE
20 granted patents·2 pending applications·509 citations·filing 2011–2017
95Inventor score
Top patents by PatentIndex Score
22 records- 0198US9748172B2Floating staircase word lines and process in a 3D non-volatile memory having vertical bit linesSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Aug 29, 2017·65 cites·10 claims
- 0298US9343507B2Dual channel vertical field effect transistor including an embedded electrodeSANDISK 3D LLC·Filed 2014·Granted May 17, 2016·75 cites·38 claims
- 0397US9673257B1Vertical thin film transistors with surround gatesSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Jun 6, 2017·197 cites·20 claims
- 0497US9613689B1Self-selecting local bit line for a three-dimensional memory arraySANDISK TECHNOLOGIES LLC·Filed 2016·Granted Apr 4, 2017·35 cites·22 claims
- 0595US10115895B1Vertical field effect transisitors having a rectangular surround gate and method of making the sameSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Oct 30, 2018·15 cites·20 claims
- 0695US9331088B2Transistor device with gate bottom isolation and method of making thereofSANDISK 3D LLC·Filed 2014·Granted May 3, 2016·23 cites·48 claims
- 0794US9449924B2Multilevel contact to a 3D memory array and method of making thereofSANDISK 3D LLC·Filed 2013·Granted Sep 20, 2016·16 cites·31 claims
- 0893US10283710B2Resistive random access memory device containing replacement word lines and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2017·Granted May 7, 2019·10 cites·10 claims
- 0993US9583539B2Word line connection for memory device and method of making thereofSANDISK 3D LLC·Filed 2014·Granted Feb 28, 2017·16 cites·37 claims
- 1090US9419058B1Memory device with comb-shaped electrode having a plurality of electrode fingers and method of making thereofSANDISK TECHNOLOGIES INC·Filed 2015·Granted Aug 16, 2016·7 cites·30 claims
- 1190US9230905B2Trench multilevel contact to a 3D memory array and method of making thereofSANDISK 3D LLC·Filed 2014·Granted Jan 5, 2016·13 cites·39 claims
- 1288US9515023B2Multilevel contact to a 3D memory array and method of making thereofSANDISK 3D LLC·Filed 2015·Granted Dec 6, 2016·10 cites·35 claims
- 1386US9595566B2Floating staircase word lines and process in a 3D non-volatile memory having vertical bit linesSANDISK TECHNOLOGIES LLC·Filed 2015·Granted Mar 14, 2017·4 cites·20 claims
- 1485US10541273B2Vertical thin film transistors with isolationSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Jan 21, 2020·4 cites·16 claims
- 1585US9698202B2Parallel bit line three-dimensional resistive random access memorySANDISK 3D LLC·Filed 2015·Granted Jul 4, 2017·8 cites·44 claims
- 1684US9646880B1Monolithic three dimensional memory arrays formed using sacrificial polysilicon pillarsSANDISK 3D LLC·Filed 2016·Granted May 9, 2017·4 cites·20 claims
- 1776US9530824B2Monolithic three dimensional memory arrays with staggered vertical bit line select transistors and methods therforSANDISK TECHNOLOGIES LLC·Filed 2014·Granted Dec 27, 2016·5 cites·24 claims
- 1875US9754999B1Vertical thin film transistors with surround gatesSANDISK TECHNOLOGIES LLC·Filed 2016·Granted Sep 5, 2017·2 cites·20 claims
- 1939US2012107970A1Manufacturing method of semiconductor deviceTAKAKI SEJE·Filed 2011·Application pending·0 cites
- 2037US10707314B2Surround gate vertical field effect transistors including tubular and strip electrodes and method of making the sameSANDISK TECHNOLOGIES LLC·Filed 2017·Granted Jul 7, 2020·0 cites·13 claims
- 2137US2019051703A1Two-dimensional array of surround gate vertical field effect transistors and method of making thereofSANDISK TECHNOLOGIES LLC·Filed 2017·Application pending·0 cites
- 2232US10096654B2Three-dimensional resistive random access memory containing self-aligned memory elementsSANDISK 3D LLC·Filed 2015·Granted Oct 9, 2018·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →