Inventor · disambiguated record
Chia-Jung Tu
Also filed as: TU CHIA-JUNG
9 granted patents·3 pending applications·6 citations·filing 2011–2020
78Inventor score
Top patents by PatentIndex Score
12 records- 0163US8704345B2Semiconductor package and lead frame thereofKUO CHIH-MING·Filed 2012·Granted Apr 22, 2014·2 cites·7 claims
- 0263US8658466B2Semiconductor package structure and method for making the sameHSIEH CHIN-TANG·Filed 2012·Granted Feb 25, 2014·2 cites·13 claims
- 0358US8497571B2Thin flip chip package structureHSIEH CHIN-TANG·Filed 2011·Granted Jul 30, 2013·2 cites·6 claims
- 0457US2021035947A1Method and device for compression bonding chip to substrateCHIPBOND TECHNOLOGY CORP·Filed 2020·Application pending·0 cites
- 0553US9961759B2Flexible substrateCHIPBOND TECHNOLOGY CORP·Filed 2016·Granted May 1, 2018·0 cites·13 claims
- 0652US2020105712A1Method and device for compression bonding chip to substrateCHIPBOND TECHNOLOGY CORP·Filed 2019·Application pending·0 cites
- 0748US9510441B2Flexible substrateCHIPBOND TECH CORP·Filed 2015·Granted Nov 29, 2016·0 cites·7 claims
- 0848US9159660B2Semiconductor package structure and method for making the sameCHIPBOND TECHNOLOGY CORP·Filed 2013·Granted Oct 13, 2015·0 cites·10 claims
- 0941US2014217578A1Semiconductor package process and structure thereofCHIPBOND TECHNOLOGY CORP·Filed 2013·Application pending·0 cites
- 1038US8581384B2Semiconductor package structureHSIEH CHIN-TANG·Filed 2012·Granted Nov 12, 2013·0 cites·6 claims
- 1134US8471372B2Thin flip chip package structureHSIEH CHIN-TANG·Filed 2011·Granted Jun 25, 2013·0 cites·7 claims
- 1230US9929051B1Wafer dicing methodCHIPBOND TECHNOLOGY CORP·Filed 2016·Granted Mar 27, 2018·0 cites·3 claims
Join the waitlist — get patent alerts
Get an alert when Chia-Jung Tu files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →