Inventor · disambiguated record
Maged M. Michael
Also filed as: MICHAEL MAGED M · MICHAEL MAGED MILAD
124 granted patents·8 pending applications·847 citations·filing 1998–2019
99Inventor score
Top patents by PatentIndex Score
132 records- 0197US9696928B2Memory transaction having implicit ordering effectsIBM·Filed 2014·Granted Jul 4, 2017·38 cites·6 claims
- 0297US9619383B2Dynamic predictor for coalescing memory transactionsIBM·Filed 2015·Granted Apr 11, 2017·18 cites·17 claims
- 0397US9535696B1Instruction to cancel outstanding cache prefetchesIBM·Filed 2016·Granted Jan 3, 2017·17 cites·20 claims
- 0497US9262207B2Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environmentsIBM·Filed 2015·Granted Feb 16, 2016·20 cites·5 claims
- 0596US9244782B2Salvaging hardware transactionsIBM·Filed 2015·Granted Jan 26, 2016·13 cites·6 claims
- 0696US9244781B2Salvaging hardware transactionsIBM·Filed 2015·Granted Jan 26, 2016·16 cites·6 claims
- 0795US9298626B2Managing high-conflict cache lines in transactional memory computing environmentsGLOBALFOUNDRIES INC·Filed 2013·Granted Mar 29, 2016·25 cites·17 claims
- 0895US9158573B2Dynamic predictor for coalescing memory transactionsIBM·Filed 2013·Granted Oct 13, 2015·23 cites·18 claims
- 0995US8539486B2Transactional block conflict resolution based on the determination of executing threads in parallel or in serial modeCAIN III HAROLD W·Filed 2009·Granted Sep 17, 2013·68 cites·18 claims
- 1094US9740616B2Multi-granular cache management in multi-processor computing environmentsIBM·Filed 2015·Granted Aug 22, 2017·10 cites·16 claims
- 1194US9430276B2Coalescing memory transactionsIBM·Filed 2015·Granted Aug 30, 2016·10 cites·20 claims
- 1294US9342397B2Salvaging hardware transactions with instructionsIBM·Filed 2015·Granted May 17, 2016·12 cites·8 claims
- 1394US9336047B2Prefetching of discontiguous storage locations in anticipation of transactional executionIBM·Filed 2014·Granted May 10, 2016·16 cites·14 claims
- 1494US9262206B2Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environmentsIBM·Filed 2014·Granted Feb 16, 2016·18 cites·15 claims
- 1594US9146774B2Coalescing memory transactionsIBM·Filed 2013·Granted Sep 29, 2015·21 cites·20 claims
- 1693US9846593B2Predicting the length of a transactionIBM·Filed 2015·Granted Dec 19, 2017·9 cites·5 claims
- 1792US10223154B2Hint instruction for managing transactional aborts in transactional memory computing environmentsIBM·Filed 2016·Granted Mar 5, 2019·6 cites·20 claims
- 1892US10168961B2Hardware transaction transient conflict resolutionIBM·Filed 2018·Granted Jan 1, 2019·6 cites·20 claims
- 1992US9904572B2Dynamic prediction of hardware transaction resource requirementsIBM·Filed 2015·Granted Feb 27, 2018·7 cites·15 claims
- 2092US9690556B2Code optimization to enable and disable coalescing of memory transactionsIBM·Filed 2016·Granted Jun 27, 2017·7 cites·20 claims
- 2192US9336097B2Salvaging hardware transactionsIBM·Filed 2014·Granted May 10, 2016·12 cites·14 claims
- 2292US9329946B2Salvaging hardware transactionsIBM·Filed 2014·Granted May 3, 2016·12 cites·14 claims
- 2392US6628615B1Two level virtual channelsIBM·Filed 2000·Granted Sep 30, 2003·99 cites·32 claims
- 2491US9639415B2Salvaging hardware transactions with instructionsIBM·Filed 2015·Granted May 2, 2017·7 cites·6 claims
- 2591US9348523B2Code optimization to enable and disable coalescing of memory transactionsIBM·Filed 2013·Granted May 24, 2016·11 cites·12 claims
- 2691US9311178B2Salvaging hardware transactions with instructionsIBM·Filed 2014·Granted Apr 12, 2016·12 cites·16 claims
- 2790US9348643B2Prefetching of discontiguous storage locations as part of transactional executionIBM·Filed 2014·Granted May 24, 2016·10 cites·13 claims
- 2889US9471371B2Dynamic prediction of concurrent hardware transactions resource requirements and allocationIBM·Filed 2014·Granted Oct 18, 2016·8 cites·20 claims
- 2989US9454483B2Salvaging lock elision transactions with instructions to change execution typeIBM·Filed 2015·Granted Sep 27, 2016·5 cites·10 claims
- 3089US9424072B2Alerting hardware transactions that are about to run out of spaceIBM·Filed 2014·Granted Aug 23, 2016·9 cites·12 claims
- 3189US9086974B2Centralized management of high-contention cache lines in multi-processor computing environmentsIBM·Filed 2013·Granted Jul 21, 2015·12 cites·20 claims
- 3288US9524196B2Adaptive process for data sharing with selection of lock elision and lockingIBM·Filed 2015·Granted Dec 20, 2016·5 cites·3 claims
- 3388US9442776B2Salvaging hardware transactions with instructions to transfer transaction execution controlIBM·Filed 2015·Granted Sep 13, 2016·5 cites·10 claims
- 3487US9858074B2Non-default instruction handling within transactionIBM·Filed 2015·Granted Jan 2, 2018·4 cites·11 claims
- 3586US9563468B1Interprocessor memory status communicationIBM·Filed 2016·Granted Feb 7, 2017·3 cites·4 claims
- 3686US9389802B2Hint instruction for managing transactional aborts in transactional memory computing environmentsIBM·Filed 2015·Granted Jul 12, 2016·3 cites·8 claims
- 3785US9753764B2Alerting hardware transactions that are about to run out of spaceIBM·Filed 2016·Granted Sep 5, 2017·3 cites·14 claims
- 3885US9563467B1Interprocessor memory status communicationIBM·Filed 2015·Granted Feb 7, 2017·3 cites·8 claims
- 3984US9830185B2Indicating nearing the completion of a transactionIBM·Filed 2015·Granted Nov 28, 2017·3 cites·6 claims
- 4084US9448836B2Alerting hardware transactions that are about to run out of spaceIBM·Filed 2015·Granted Sep 20, 2016·3 cites·5 claims
- 4183US9921872B2Interprocessor memory status communicationIBM·Filed 2016·Granted Mar 20, 2018·3 cites·9 claims
- 4283US9916180B2Interprocessor memory status communicationIBM·Filed 2016·Granted Mar 13, 2018·3 cites·11 claims
- 4383US9870253B2Enabling end of transaction detection using speculative look aheadIBM·Filed 2015·Granted Jan 16, 2018·3 cites·14 claims
- 4483US9720725B2Prefetching of discontiguous storage locations as part of transactional executionIBM·Filed 2015·Granted Aug 1, 2017·3 cites·7 claims
- 4583US9442853B2Salvaging lock elision transactions with instructions to change execution typeIBM·Filed 2014·Granted Sep 13, 2016·5 cites·20 claims
- 4682US10565117B2Instruction to cancel outstanding cache prefetchesIBM·Filed 2018·Granted Feb 18, 2020·2 cites·17 claims
- 4782US9547595B2Salvaging lock elision transactionsIBM·Filed 2015·Granted Jan 17, 2017·3 cites·8 claims
- 4882US9442775B2Salvaging hardware transactions with instructions to transfer transaction execution controlIBM·Filed 2014·Granted Sep 13, 2016·5 cites·20 claims
- 4982US9329890B2Managing high-coherence-miss cache lines in multi-processor computing environmentsGLOBALFOUNDRIES INC·Filed 2013·Granted May 3, 2016·6 cites·17 claims
- 5082US6826651B2State-based allocation and replacement for improved hit ratio in directory cachesIBM·Filed 2001·Granted Nov 30, 2004·35 cites·21 claims
Showing the top 50 of 132 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →