Inventor · disambiguated record
Sheldon Douglas Haynie
Also filed as: HAYNIE SHELDON · HAYNIE SHELDON D · HAYNIE SHELDON DOUGLAS
13 granted patents·8 pending applications·67 citations·filing 2001–2024
89Inventor score
Top patents by PatentIndex Score
21 records- 0195US10978559B1MOS transistor with folded channel and folded drift regionTEXAS INSTRUMENTS INC·Filed 2020·Granted Apr 13, 2021·5 cites·20 claims
- 0285US8445353B1Method for integrating MIM capacitor and thin film resistor in modular two layer metal process and corresponding deviceRAGHAVAN VENKAT·Filed 2009·Granted May 21, 2013·16 cites·4 claims
- 0382US11257948B2Integrated schottky diode with guard ringTEXAS INSTRUMENTS INC·Filed 2019·Granted Feb 22, 2022·3 cites·16 claims
- 0480US6716709B1Transistors formed with grid or island implantation masks to form reduced diffusion-depth regions without additional masks and process stepsTEXAS INSTRUMENTS INC·Filed 2002·Granted Apr 6, 2004·23 cites·23 claims
- 0575US12211807B2Semiconductor doped region with biased isolated membersTEXAS INSTRUMENTS INC·Filed 2023·Granted Jan 28, 2025·0 cites·19 claims
- 0674US10886418B2Split-gate JFET with field plateTEXAS INSTRUMENTS INC·Filed 2019·Granted Jan 5, 2021·2 cites·20 claims
- 0764US11527617B2MOS transistor with folded channel and folded drift regionTEXAS INSTRUMENTS INC·Filed 2021·Granted Dec 13, 2022·0 cites·17 claims
- 0864US6800917B2Bladed silicon-on-insulator semiconductor devices and method of makingTEXAS INSTRUMENTS INC·Filed 2002·Granted Oct 5, 2004·10 cites·6 claims
- 0960US11830830B2Semiconductor doped region with biased isolated membersTEXAS INSTRUMENTS INC·Filed 2021·Granted Nov 28, 2023·0 cites·26 claims
- 1060US2022140129A1Integrated schottky diode with guard ringTEXAS INSTRUMENTS INC·Filed 2022·Application pending·0 cites
- 1158US6869851B2Transistors formed with grid or island implantation masks to form reduced diffusion-depth regions without additional masks and process stepsTEXAS INSTRUMENTS INC·Filed 2004·Granted Mar 22, 2005·5 cites·4 claims
- 1257US2025212442A1Integrated circuit (ic) with corrugated channel structures having vertically separated source and body contact regionsTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 1356US2025246431A1Integrated circuit (ic) with corrugated channel structures having controlled doping profile over channel topography based on dopant balancing oxidationTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 1456US2025140560A1Integrated circuit (ic) with corrugated channel structureTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 1556US2025246432A1Integrated circuit with corrugated channel structures having controlled doping profile over channel topographyTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 1651US2023387260A1Selective epitaxy to create a double-diffused channel over planar or underlying topographyTEXAS INSTRUMENTS INC·Filed 2022·Application pending·0 cites
- 1744US6797547B2Bladed silicon-on-insulator semiconductor devices and method of makingTEXAS INSTRUMENTS INC·Filed 2003·Granted Sep 28, 2004·2 cites·11 claims
- 1838US6890826B2Method of making bipolar transistor with integrated base contact and field plateTEXAS INSTRUMENTS INC·Filed 2002·Granted May 10, 2005·1 cites·3 claims
- 1934US2004222485A1Bladed silicon-on-insulator semiconductor devices and method of makingFiled 2004·Application pending·0 cites
- 2031US2003025154A1LDMOS high voltage structure compatible with VLSI CMOS processesFiled 2001·Application pending·0 cites
- 2130US8492255B2Trenched Schottky diode and method of forming a trenched Schottky diodeHAYNIE SHELDON D·Filed 2011·Granted Jul 23, 2013·0 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →