Inventor · disambiguated record
Sergio A. Ajuria
Also filed as: AJURIA SERGIO · AJURIA SERGIO A
13 granted patents·1 pending application·1,450 citations·filing 1993–2016
93Inventor score
Top patents by PatentIndex Score
14 records- 0198US5324683AMethod of forming a semiconductor structure having an air regionMOTOROLA INC·Filed 1993·Granted Jun 28, 1994·692 cites·36 claims
- 0295US5736435AProcess for fabricating a fully self-aligned soi mosfetMOTOROLA INC·Filed 1995·Granted Apr 7, 1998·168 cites·12 claims
- 0395US5510645ASemiconductor structure having an air region and method of forming the semiconductor structureMOTOROLA INC·Filed 1995·Granted Apr 23, 1996·238 cites·11 claims
- 0490US5885870AMethod for forming a semiconductor device having a nitrided oxide dielectric layerMOTOROLA INC·Filed 1997·Granted Mar 23, 1999·120 cites·16 claims
- 0589US9548266B2Semiconductor package with embedded capacitor and methods of manufacturing sameAJURIA SERGIO A·Filed 2014·Granted Jan 17, 2017·20 cites·5 claims
- 0687US5837612ASilicon chemical mechanical polish etch (CMP) stop for reduced trench fill erosion and method for formationMOTOROLA INC·Filed 1997·Granted Nov 17, 1998·125 cites·33 claims
- 0781US5963818ACombined trench isolation and inlaid process for integrated circuit formationMOTOROLA INC·Filed 1997·Granted Oct 5, 1999·63 cites·23 claims
- 0874US10522615B2Semiconductor package with embedded capacitor and methods of manufacturing sameNXP USA INC·Filed 2016·Granted Dec 31, 2019·2 cites·9 claims
- 0966US9601354B2Semiconductor manufacturing for forming bond pads and seal ringsREBER DOUGLAS M·Filed 2014·Granted Mar 21, 2017·2 cites·12 claims
- 1061US10553508B2Semiconductor manufacturing using disposable test circuitry within scribe lanesREBER DOUGLAS M·Filed 2014·Granted Feb 4, 2020·1 cites·5 claims
- 1157US5665620AMethod for forming concurrent top oxides using reoxidized silicon in an EPROMMOTOROLA INC·Filed 1994·Granted Sep 9, 1997·19 cites·20 claims
- 1243US8059380B2Package level ESD protection and method thereforAJURIA SERGIO A·Filed 2008·Granted Nov 15, 2011·0 cites·4 claims
- 1342US9134366B2Method for forming a packaged semiconductor deviceAJURIA SERGIO A·Filed 2013·Granted Sep 15, 2015·0 cites·20 claims
- 1437US2006022353A1Probe pad arrangement for an integrated circuit and method of formingAJURIA SERGIO A·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →