Inventor · disambiguated record
Trace Hurd
Also filed as: HURD TRACE · HURD TRACE Q · HURD TRACE QUENTIN
17 granted patents·5 pending applications·84 citations·filing 2001–2024
91Inventor score
Files withTEXAS INSTRUMENTS INC10TOKYO ELECTRON LTD8ADVANCED TECH MATERIALS1AGILENT TECHNOLOGIES INC1ENTEGRIS INC1
Top patents by PatentIndex Score
22 records- 0187US7528072B2Crystallographic preferential etch to define a recessed-region for epitaxial growthTEXAS INSTRUMENTS INC·Filed 2006·Granted May 5, 2009·9 cites·11 claims
- 0284US8049254B2Semiconductor device with gate-undercutting recessed regionTEXAS INSTRUMENTS INC·Filed 2009·Granted Nov 1, 2011·7 cites·8 claims
- 0379US6787425B1Methods for fabricating transistor gate structuresTEXAS INSTRUMENTS INC·Filed 2003·Granted Sep 7, 2004·27 cites·15 claims
- 0479US6709875B2Contamination control for embedded ferroelectric device fabrication processesAGILENT TECHNOLOGIES INC·Filed 2001·Granted Mar 23, 2004·22 cites·16 claims
- 0572US12002687B2System and methods for wafer dryingTOKYO ELECTRON LTD·Filed 2022·Granted Jun 4, 2024·0 cites·16 claims
- 0670US10886290B2Etching of silicon nitride and silica deposition control in 3D NAND structuresTOKYO ELECTRON LTD·Filed 2019·Granted Jan 5, 2021·1 cites·20 claims
- 0763US7422969B2Multi-step process for patterning a metal gate electrodeTEXAS INSTRUMENTS INC·Filed 2007·Granted Sep 9, 2008·1 cites·8 claims
- 0862US11515178B2System and methods for wafer dryingTOKYO ELECTRON LTD·Filed 2020·Granted Nov 29, 2022·0 cites·18 claims
- 0959US7323403B2Multi-step process for patterning a metal gate electrodeTEXAS INSTR INCROPORATED·Filed 2004·Granted Jan 29, 2008·6 cites·8 claims
- 1054US2025224282A1Integrated optical nanothermometry for real-time wafer temperature monitoring during processingTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 1153US7195679B2Versatile system for wafer edge remediationTEXAS INSTRUMENTS INC·Filed 2003·Granted Mar 27, 2007·4 cites·29 claims
- 1252US7371691B2Silicon recess improvement through improved post implant resist removal and cleansTEXAS INSTRUMENTS INC·Filed 2004·Granted May 13, 2008·3 cites·14 claims
- 1349US10844332B2Aqueous cleaning solution and method of protecting features on a substrate during etch residue removalTOKYO ELECTRON LTD·Filed 2018·Granted Nov 24, 2020·0 cites·18 claims
- 1448US2011117751A1Non-selective oxide etch wet clean composition and method of useADVANCED TECH MATERIALS·Filed 2009·Application pending·0 cites
- 1547US11376640B2Apparatus and method to electrostatically remove foreign matter from substrate surfacesTOKYO ELECTRON LTD·Filed 2019·Granted Jul 5, 2022·0 cites·20 claims
- 1647US6995088B2Surface treatment of copper to improve interconnect formationTEXAS INSTRUMENTS INC·Filed 2004·Granted Feb 7, 2006·2 cites·21 claims
- 1746US7132365B2Treatment of silicon prior to nickel silicide formationTEXAS INSTRUMENTS INC·Filed 2004·Granted Nov 7, 2006·2 cites·10 claims
- 1845US7732345B2Method for using a modified post-etch clean rinsing agentTEXAS INSTRUMENTS INC·Filed 2006·Granted Jun 8, 2010·0 cites·14 claims
- 1945US2021384049A1System and Method for Wet Chemical Etching in Semiconductor ProcessingTOKYO ELECTRON LTD·Filed 2020·Application pending·0 cites
- 2040US7037823B2Method to reduce silanol and improve barrier properties in low k dielectric ic interconnectsTEXAS INSTRUMENTS INC·Filed 2004·Granted May 2, 2006·0 cites·14 claims
- 2137US2017345665A1Atomic layer etching systems and methodsTOKYO ELECTRON LTD·Filed 2017·Application pending·0 cites
- 2237US2015045277A1Post-cmp formulation having improved barrier layer compatibility and cleaning performanceENTEGRIS INC·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →