Inventor · disambiguated record
Shou-Cheng Hu
Also filed as: HU SHOU CHENG ERIC · Hu shou-cheng
20 granted patents·3 pending applications·37 citations·filing 2014–2023
92Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD10DIALOG SEMICONDUCTOR UK LTD9DIALOG SEMICONDUCTOR BV2TAIWAN SEMICONDUCTOR MFG2
Top patents by PatentIndex Score
23 records- 0193US10008479B2Semiconductor device with discrete blocksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jun 26, 2018·5 cites·20 claims
- 0290US9543278B2Semiconductor device with discrete blocksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jan 10, 2017·4 cites·20 claims
- 0390US9330947B2Methods for forming package-on-package structures having buffer damsTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted May 3, 2016·7 cites·20 claims
- 0488US12334476B2Semiconductor device with discrete blocksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 0587US10510727B2Semiconductor device with discrete blocksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 17, 2019·2 cites·20 claims
- 0686US10629507B1System in package (SIP)DIALOG SEMICONDUCTOR UK LTD·Filed 2018·Granted Apr 21, 2020·5 cites·8 claims
- 0785US10636742B2Very thin embedded trace substrate-system in package (SIP)DIALOG SEMICONDUCTOR UK LTD·Filed 2017·Granted Apr 28, 2020·4 cites·16 claims
- 0885US9837289B2Methods for forming package-on-package structures having buffer damsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 5, 2017·3 cites·20 claims
- 0984US11239185B2Embedded resistor-capacitor film for fan out wafer level packagingDIALOG SEMICONDUCTOR UK LTD·Filed 2017·Granted Feb 1, 2022·3 cites·11 claims
- 1080US11855045B2Semiconductor device with discrete blocksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 26, 2023·0 cites·20 claims
- 1178US11094669B2Wafer level molded PPGA (pad post grid array) for low cost packageDIALOG SEMICONDUCTOR BV·Filed 2019·Granted Aug 17, 2021·2 cites·15 claims
- 1272US11217562B2Semiconductor device with discrete blocksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jan 4, 2022·0 cites·20 claims
- 1366US12100674B2Embedded resistor-capacitor film for fan out wafer level packagingDIALOG SEMICONDUCTOR UK LTD·Filed 2022·Granted Sep 24, 2024·0 cites·15 claims
- 1466US2021287966A1Semiconductor package and method of makingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Application pending·0 cites
- 1565US11114359B2Wafer level chip scale package structureDIALOG SEMICONDUCTOR UK LTD·Filed 2018·Granted Sep 7, 2021·1 cites·14 claims
- 1665US9293449B2Methods and apparatus for package on package devices with reversed stud bump through via interconnectionsTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Mar 22, 2016·1 cites·20 claims
- 1759US11387171B2Method of packaging a semiconductor dieTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jul 12, 2022·0 cites·20 claims
- 1859US10854577B23D die stacking structure with fine pitchesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 1, 2020·0 cites·21 claims
- 1958US11309255B2Very thin embedded trace substrate-system in package (SIP)DIALOG SEMICONDUCTOR UK LTD·Filed 2020·Granted Apr 19, 2022·0 cites·14 claims
- 2049US2019181115A1Wafer Level Molded PPGA (Pad Post Grid Array) for Low Cost PackageDIALOG SEMICONDUCTOR UK LTD·Filed 2017·Application pending·0 cites
- 2143US11251132B1Integrated type MIS substrate for thin double side SIP packageDIALOG SEMICONDUCTOR UK LTD·Filed 2019·Granted Feb 15, 2022·0 cites·15 claims
- 2241US10727174B2Integrated circuit package and a method for forming a wafer level chip scale package (WLCSP) with through mold via (TMV)DIALOG SEMICONDUCTOR UK LTD·Filed 2018·Granted Jul 28, 2020·0 cites·25 claims
- 2338US2019267342A1Wafer Level UGA (UBM Grid Array) & PGA (Pad Grid Array) for Low Cost PackageDIALOG SEMICONDUCTOR BV·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →