Inventor · disambiguated record
John S. Kuslak
Also filed as: KUSLAK JOHN S · KUSLAK JOHN STEVEN
19 granted patents·1 pending application·494 citations·filing 1994–2009
96Inventor score
Top patents by PatentIndex Score
20 records- 0188US7673190B1System and method for detecting and recovering from errors in an instruction stream of an electronic data processing systemUNISYS CORP·Filed 2005·Granted Mar 2, 2010·21 cites·28 claims
- 0288US6751756B1First level cache parity error injectUNISYS CORP·Filed 2000·Granted Jun 15, 2004·63 cites·20 claims
- 0384US6654875B1Dual microcode RAM address mode instruction execution using operation code RAM storing control words with alternate address indicatorUNISYS CORP·Filed 2000·Granted Nov 25, 2003·43 cites·17 claims
- 0469US5872910AParity-error injection system for an instruction processorUNISYS CORP·Filed 1996·Granted Feb 16, 1999·59 cites·19 claims
- 0568US6167479ASystem and method for testing interrupt processing logic within an instruction processorUNISYS CORP·Filed 1998·Granted Dec 26, 2000·65 cites·27 claims
- 0660US5905881ADelayed state writes for an instruction processorUNISYS CORP·Filed 1997·Granted May 18, 1999·41 cites·45 claims
- 0757US7389407B1Central control system and method for using state information to model inflight pipelined instructionsUNISYS CORP·Filed 2002·Granted Jun 17, 2008·5 cites·23 claims
- 0857US7114063B1Condition indicator for use by a conditional branch instructionUNISYS CORP·Filed 2000·Granted Sep 26, 2006·8 cites·25 claims
- 0956US7093190B1System and method for handling parity errors in a data processing systemUNISYS CORP·Filed 2002·Granted Aug 15, 2006·12 cites·41 claims
- 1054US5867699AInstruction flow control for an instruction processorUNISYS CORP·Filed 1996·Granted Feb 2, 1999·30 cites·29 claims
- 1154US5577259AInstruction processor control system using separate hardware and microcode control signals to control the pipelined execution of multiple classes of machine instructionsUNISYS CORP·Filed 1994·Granted Nov 19, 1996·30 cites·30 claims
- 1253US2010131796A1System and Method for Detecting and Recovering from Errors in an Instruction Stream of an Electronic Data Processing SystemENGELBRECHT KENNETH L·Filed 2009·Application pending·0 cites
- 1352US5675768AStore software instrumentation package instructionUNISYS CORP·Filed 1996·Granted Oct 7, 1997·28 cites·27 claims
- 1448US5911083AProgrammable processor execution rate controllerUNISYS CORP·Filed 1996·Granted Jun 8, 1999·20 cites·21 claims
- 1541US5434986AInterdependency control of pipelined instruction processor using comparing result of two index registers of skip instruction and next sequential instructionUNISYS CORP·Filed 1994·Granted Jul 18, 1995·19 cites·5 claims
- 1638US7058793B1Pipeline controller for providing independent execution between the preliminary and advanced stages of a synchronous pipelineUNISYS CORP·Filed 1999·Granted Jun 6, 2006·11 cites·33 claims
- 1738US5761740AMethod of and apparatus for rapidly loading addressing registersUNISYS CORP·Filed 1995·Granted Jun 2, 1998·11 cites·23 claims
- 1837US6839833B1Pipeline depth controller for an instruction processorUNISYS CORP·Filed 1999·Granted Jan 4, 2005·11 cites·22 claims
- 1937US6108761AMethod of and apparatus for saving time performing certain transfer instructionsUNISYS CORP·Filed 1998·Granted Aug 22, 2000·10 cites·10 claims
- 2034US5724533AHigh performance instruction data pathUNISYS CORP·Filed 1995·Granted Mar 3, 1998·7 cites·39 claims
Join the waitlist — get patent alerts
Get an alert when John S. Kuslak files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →