Inventor · disambiguated record
Johannes Stecker
Also filed as: STECKER JOHANNES
18 granted patents·7 pending applications·297 citations·filing 1996–2009
94Inventor score
Top patents by PatentIndex Score
25 records- 0191US7411843B2Semiconductor memory arrangement with branched control and address busINFINEON TECHNOLOGIES AG·Filed 2005·Granted Aug 12, 2008·28 cites·26 claims
- 0291US5870345ATemperature independent oscillatorSIEMENS AG·Filed 1997·Granted Feb 9, 1999·103 cites·23 claims
- 0389US8015438B2Memory circuitQIMONDA AG·Filed 2007·Granted Sep 6, 2011·25 cites·21 claims
- 0489US7397684B2Semiconductor memory array with serial control/address busINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jul 8, 2008·22 cites·17 claims
- 0588US8120958B2Multi-die memory, apparatus and multi-die memory stackBILGER CHRISTOPH·Filed 2007·Granted Feb 21, 2012·24 cites·13 claims
- 0684US8041865B2Bus termination system and methodQIMONDA AG·Filed 2008·Granted Oct 18, 2011·14 cites·66 claims
- 0782US7848153B2High speed memory architectureQIMONDA AG·Filed 2008·Granted Dec 7, 2010·13 cites·30 claims
- 0880US7928525B2Integrated circuit with wireless connectionQIMONDA AG·Filed 2008·Granted Apr 19, 2011·10 cites·21 claims
- 0978US8914589B2Multi-port DRAM architecture for accessing different memory partitionsGREGORIUS PETER·Filed 2008·Granted Dec 16, 2014·10 cites·33 claims
- 1071US8495310B2Method and system including plural memory controllers and a memory access control bus for accessing a memory deviceGREGORIUS PETER·Filed 2008·Granted Jul 23, 2013·6 cites·28 claims
- 1171US7771206B2Horizontal dual in-line memory modulesQIMONDA AG·Filed 2008·Granted Aug 10, 2010·4 cites·34 claims
- 1262US5646434ASemiconductor component with protective structure for protecting against electrostatic dischargeSIEMENS AG·Filed 1996·Granted Jul 8, 1997·32 cites·11 claims
- 1356US8271827B2Memory system with extended memory density capabilityBILGER CHRISTOPH·Filed 2007·Granted Sep 18, 2012·1 cites·22 claims
- 1450US8161219B2Distributed command and address bus architecture for a memory module having portions of bus lines separately disposedBRUENNERT MICHAEL·Filed 2008·Granted Apr 17, 2012·0 cites·28 claims
- 1547US8144755B2Method and apparatus for determining a skewBRUENNERT MICHAEL·Filed 2007·Granted Mar 27, 2012·0 cites·22 claims
- 1646US2011034045A1Stacking Technique for Circuit DevicesQIMONDA AG·Filed 2009·Application pending·0 cites
- 1746US2009267678A1Integrated Circuit with Improved Data RateQIMONDA AG·Filed 2008·Application pending·0 cites
- 1844US2010032820A1Stacked Memory ModuleBRUENNERT MICHAEL·Filed 2008·Application pending·0 cites
- 1937US7920433B2Method and apparatus for storage device with a logic unit and method for manufacturing sameQIMONDA AG·Filed 2008·Granted Apr 5, 2011·0 cites·25 claims
- 2037US7844798B2Command protocol for integrated circuitsQIMONDA AG·Filed 2007·Granted Nov 30, 2010·0 cites·25 claims
- 2134US5774014AIntegrated buffer circuit which functions independently of fluctuations on the supply voltageSIEMENS AG·Filed 1996·Granted Jun 30, 1998·5 cites·5 claims
- 2234US2009190432A1DRAM with Page AccessBILGER CHRISTOPH·Filed 2008·Application pending·0 cites
- 2334US2009175115A1Memory device, method for accessing a memory device and method for its manufacturingBILGER CHRISTOPH·Filed 2008·Application pending·0 cites
- 2434US2009287957A1Method for controlling a memory module and memory control unitBILGER CHRISTOPH·Filed 2008·Application pending·0 cites
- 2534US2009129189A1Method and apparatus for monitoring a memory deviceBILGER CHRISTOPH·Filed 2007·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Johannes Stecker files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →