Inventor · disambiguated record
Yoav Lossin
Also filed as: LOSSIN YOAV
10 granted patents·1 pending application·8 citations·filing 2012–2023
81Inventor score
Top patents by PatentIndex Score
11 records- 0181US10055360B2Apparatus and method for shared least recently used (LRU) policy between multiple cache levelsINTEL CORP·Filed 2015·Granted Aug 21, 2018·3 cites·25 claims
- 0270US12056376B2Interconnected memory grid with bypassable unitsNEXT SILICON LTD·Filed 2023·Granted Aug 6, 2024·0 cites·17 claims
- 0369US8850258B2Calibration for source-synchronous high frequency bus synchronization schemesLOSSIN YOAV·Filed 2012·Granted Sep 30, 2014·4 cites·26 claims
- 0467US11644990B2Interconnected memory grid with bypassable unitsNEXT SILICON LTD·Filed 2022·Granted May 9, 2023·0 cites·17 claims
- 0564US9514047B2Apparatus and method to dynamically expand associativity of a cache memoryINTEL CORP·Filed 2014·Granted Dec 6, 2016·1 cites·20 claims
- 0662US11269526B2Interconnected memory grid with bypassable unitsNEXT SILICON LTD·Filed 2020·Granted Mar 8, 2022·0 cites·16 claims
- 0758US10657070B2Apparatus and method for shared least recently used (LRU) policy between multiple cache levelsINTEL CORP·Filed 2018·Granted May 19, 2020·0 cites·20 claims
- 0854US10635593B2Create page locality in cache controller cache allocationINTEL CORP·Filed 2017·Granted Apr 28, 2020·0 cites·18 claims
- 0951US2017357599A1Enhancing Cache Performance by Utilizing Scrubbed State Indicators Associated With Cache EntriesINTEL CORP·Filed 2017·Application pending·0 cites
- 1050US9846648B2Create page locality in cache controller cache allocationINTEL CORP·Filed 2015·Granted Dec 19, 2017·0 cites·22 claims
- 1150US9767042B2Enhancing cache performance by utilizing scrubbed state indicators associated with cache entriesINTEL CORP·Filed 2015·Granted Sep 19, 2017·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →