Inventor · disambiguated record
Hai-Jeong Sohn
Also filed as: SOHN HAI JEONG
9 granted patents·1 pending application·266 citations·filing 1993–2003
90Inventor score
Files withSAMSUNG ELECTRONICS CO LTD9
Top patents by PatentIndex Score
10 records- 0192USD432096SSemiconductor moduleSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Oct 17, 2000·48 cites·1 claims
- 0290US6724074B2Stack semiconductor chip package and lead frameSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Apr 20, 2004·66 cites·27 claims
- 0390USD432097SSemiconductor packageSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Oct 17, 2000·42 cites·1 claims
- 0476US5428247ADown-bonded lead-on-chip type semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 1993·Granted Jun 27, 1995·56 cites·8 claims
- 0555US6319828B1Method for manufacturing a chip scale package having copper traces selectively plated with goldSAMSUNG ELECTRONICS CO LTD·Filed 1999·Granted Nov 20, 2001·18 cites·14 claims
- 0654US7480776B2Circuits and methods for providing variable data I/O width for semiconductor memory devicesSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jan 20, 2009·8 cites·23 claims
- 0750US6573611B1Dual-lead type square semiconductor package and dual in-line memory module using the sameSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Jun 3, 2003·4 cites·23 claims
- 0846US5933708ALead-on-chip semiconductor package and method for making the sameSAMSUNG ELECTRONICS CO LTD·Filed 1997·Granted Aug 3, 1999·13 cites·14 claims
- 0942US5811875ALead frames including extended tie-bars, and semiconductor chip packages using sameSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Sep 22, 1998·11 cites·13 claims
- 1037US2002048951A1Method for manufacturing a chip scale packageFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →