Inventor · disambiguated record
Daniel Shimizu
Also filed as: SHIMIZU DANIEL · SHIMIZU DANIEL P · SHIMIZU DANIEL PARRENAS
3 granted patents·1 pending application·17 citations·filing 2007–2012
64Inventor score
Top patents by PatentIndex Score
4 records- 0178US8314647B2Dynamic leakage control using selective back-biasingSHIMIZU DANIEL·Filed 2011·Granted Nov 20, 2012·8 cites·12 claims
- 0277US8527794B2Realtime power management of integrated circuitsIBRAHIM ALI·Filed 2010·Granted Sep 3, 2013·9 cites·27 claims
- 0339US9277168B2Subframe level latency de-interlacing method and apparatusGEORGE REX·Filed 2012·Granted Mar 1, 2016·0 cites·25 claims
- 0438US2008197914A1Dynamic leakage control using selective back-biasingSHIMIZU DANIEL·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →