Inventor · disambiguated record
Eugene A. Fitzgerald
Also filed as: FITZGERALD EUGENE · FITZGERALD EUGENE A · FITZGERALD JR EUGENE A
129 granted patents·40 pending applications·6,660 citations·filing 1990–2020
99Inventor score
Files withAMBERWAVE SYSTEMS CORP51MASSACHUSETTS INST TECHNOLOGY47TAIWAN SEMICONDUCTOR MFG11FITZGERALD EUGENE A7TAIWAN SEMICONDUCTOR MFG CO LTD7
Top patents by PatentIndex Score
169 records- 0199US7535089B2Monolithically integrated light emitting devicesMASSACHUSETTS INST TECHNOLOGY·Filed 2006·Granted May 19, 2009·277 cites·45 claims
- 0299US7420201B2Strained-semiconductor-on-insulator device structures with elevated source/drain regionsAMBERWAVE SYSTEMS CORP·Filed 2005·Granted Sep 2, 2008·80 cites·25 claims
- 0399US7109516B2Strained-semiconductor-on-insulator finFET device structuresAMBERWAVE SYSTEMS CORP·Filed 2005·Granted Sep 19, 2006·100 cites·15 claims
- 0499US7074623B2Methods of forming strained-semiconductor-on-insulator finFET device structuresAMBERWAVE SYSTEMS CORP·Filed 2003·Granted Jul 11, 2006·226 cites·6 claims
- 0599US6995430B2Strained-semiconductor-on-insulator device structuresAMBERWAVE SYSTEMS CORP·Filed 2003·Granted Feb 7, 2006·485 cites·14 claims
- 0699US6831292B2Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating sameAMBERWAVE SYSTEMS CORP·Filed 2002·Granted Dec 14, 2004·361 cites·62 claims
- 0799US6555839B2Buried channel strained silicon FET using a supply layer created through ion implantationAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Apr 29, 2003·259 cites·14 claims
- 0898US6593191B2Buried channel strained silicon FET using a supply layer created through ion implantationAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Jul 15, 2003·134 cites·43 claims
- 0998US6107653AControlling threading dislocation densities in Ge on Si using graded GeSi layers and planarizationMASSACHUSETTS INST TECHNOLOGY·Filed 1998·Granted Aug 22, 2000·271 cites·18 claims
- 1097US12176461B2Method of fabricating an integrated structure for an optoelectronic device and integrated structure for an optoelectronic deviceMASSACHUSETTS INST TECHNOLOGY·Filed 2020·Granted Dec 24, 2024·6 cites·16 claims
- 1197US7250359B2Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarizationMASSACHUSETTS INST TECHNOLOGY·Filed 2001·Granted Jul 31, 2007·96 cites·5 claims
- 1297US6583015B2Gate technology for strained surface channel and strained buried channel MOSFET devicesAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Jun 24, 2003·152 cites·25 claims
- 1397US6573126B2Process for producing semiconductor article using graded epitaxial growthMASSACHUSETTS INST TECHNOLOGY·Filed 2001·Granted Jun 3, 2003·209 cites·44 claims
- 1497US6291321B1Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarizationMASSACHUSETTS INST TECHNOLOGY·Filed 1999·Granted Sep 18, 2001·213 cites·17 claims
- 1596US8120060B2Monolithically integrated silicon and III-V electronicsFITZGERALD EUGENE A·Filed 2006·Granted Feb 21, 2012·32 cites·40 claims
- 1696US6737670B2Semiconductor substrate structureMASSACHUSETTS INST TECHNOLOGY·Filed 2003·Granted May 18, 2004·90 cites·53 claims
- 1796US6703144B2Heterointegration of materials using deposition and bondingAMBERWAVE SYSTEMS CORP·Filed 2003·Granted Mar 9, 2004·98 cites·9 claims
- 1896US6677192B1Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuitsAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Jan 13, 2004·113 cites·34 claims
- 1996US5442205ASemiconductor heterostructure devices with strained semiconductor layersAT & T CORP·Filed 1993·Granted Aug 15, 1995·333 cites·23 claims
- 2096US5285086ASemiconductor devices with low dislocation defectsAT & T BELL LAB·Filed 1992·Granted Feb 8, 1994·221 cites·9 claims
- 2195US7838392B2Methods for forming III-V semiconductor device structuresTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Nov 23, 2010·17 cites·14 claims
- 2295US7588994B2Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strainAMBERWAVE SYSTEMS CORP·Filed 2005·Granted Sep 15, 2009·17 cites·24 claims
- 2395US7348259B2Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layersMASSACHUSETTS INST TECHNOLOGY·Filed 2005·Granted Mar 25, 2008·27 cites·8 claims
- 2495US7259388B2Strained-semiconductor-on-insulator device structuresAMBERWAVE SYSTEMS CORP·Filed 2005·Granted Aug 21, 2007·18 cites·18 claims
- 2595US6881632B2Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETSAMBERWAVE SYSTEMS CORP·Filed 2003·Granted Apr 19, 2005·116 cites·16 claims
- 2695US6730551B2Formation of planar strained layersMASSACHUSETTS INST TECHNOLOGY·Filed 2002·Granted May 4, 2004·93 cites·23 claims
- 2795US6713326B2Process for producing semiconductor article using graded epitaxial growthMASACHUSETTS INST OF TECHNOLOG·Filed 2003·Granted Mar 30, 2004·150 cites·19 claims
- 2895US6602613B1Heterointegration of materials using deposition and bondingAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Aug 5, 2003·82 cites·69 claims
- 2995US6503773B2Low threading dislocation density relaxed mismatched epilayers without high temperature growthAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Jan 7, 2003·71 cites·24 claims
- 3094US8026534B2III-V semiconductor device structuresTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Sep 27, 2011·10 cites·20 claims
- 3194US7297612B2Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planesAMBERWAVE SYSTEMS CORP·Filed 2005·Granted Nov 20, 2007·16 cites·16 claims
- 3294US6940089B2Semiconductor device structureMASSACHUSETTS INST TECHNOLOGY·Filed 2002·Granted Sep 6, 2005·62 cites·16 claims
- 3394US6649480B2Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETsAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Nov 18, 2003·91 cites·23 claims
- 3494US6646322B2Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuitsAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Nov 11, 2003·92 cites·19 claims
- 3593US9064930B2Methods for forming semiconductor device structuresTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jun 23, 2015·7 cites·20 claims
- 3693US7705370B2Monolithically integrated photodetectorsMASSACHUSETTS INST TECHNOLOGY·Filed 2006·Granted Apr 27, 2010·16 cites·40 claims
- 3793US7566606B2Methods of fabricating semiconductor devices having strained dual channel layersAMBERWAVE SYSTEMS CORP·Filed 2006·Granted Jul 28, 2009·19 cites·16 claims
- 3893US7138310B2Semiconductor devices having strained dual channel layersAMBERWAVE SYSTEMS CORP·Filed 2003·Granted Nov 21, 2006·60 cites·13 claims
- 3993US6039803AUtilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on siliconMASSACHUSETTS INST TECHNOLOGY·Filed 1997·Granted Mar 21, 2000·143 cites·13 claims
- 4093US5221413AMethod for making low defect density semiconductor heterostructure and devices made therebyAT & T BELL LAB·Filed 1991·Granted Jun 22, 1993·188 cites·10 claims
- 4192US7304336B2FinFET structure and method to make the sameMASSACHUSETTS INST TECHNOLOGY·Filed 2004·Granted Dec 4, 2007·59 cites·16 claims
- 4292US7256142B2Relaxed SiGe platform for high speed CMOS electronics and high speed analog circuitsAMBERWAVE SYSTEMS CORP·Filed 2004·Granted Aug 14, 2007·53 cites·34 claims
- 4392US6921914B2Process for producing semiconductor article using graded epitaxial growthMASSACHUSETTS INST TECHNOLOGY·Filed 2004·Granted Jul 26, 2005·49 cites·9 claims
- 4492US6876010B1Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarizationMASSACHUSETTS INST TECHNOLOGY·Filed 2000·Granted Apr 5, 2005·41 cites·21 claims
- 4592US6521041B2Etch stop layer systemMASSACHUSETTS INST TECHNOLOGY·Filed 1999·Granted Feb 18, 2003·135 cites·10 claims
- 4692US6232138B1Relaxed InxGa(1-x)as buffersMASSACHUSETTS INST TECHNOLOGY·Filed 1998·Granted May 15, 2001·107 cites·26 claims
- 4791US8604330B1High-efficiency solar-cell arrays with integrated devices and methods for forming themHENNESSY JOHN J·Filed 2011·Granted Dec 10, 2013·28 cites·19 claims
- 4891US8586452B2Methods for forming semiconductor device structuresLOCHTEFELD ANTHONY J·Filed 2011·Granted Nov 19, 2013·6 cites·19 claims
- 4991US6518644B2Low threading dislocation density relaxed mismatched epilayers without high temperature growthAMBERWAVE SYSTEMS CORP·Filed 2001·Granted Feb 11, 2003·39 cites·30 claims
- 5090US7390701B2Method of forming a digitalized semiconductor structureMASSACHUSETTS INST TECHNOLOGY·Filed 2005·Granted Jun 24, 2008·16 cites·20 claims
Showing the top 50 of 169 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →