Inventor · disambiguated record
Basanth Jagannathan
Also filed as: JAGANNATHAN BASANTH
24 granted patents·5 pending applications·319 citations·filing 2000–2023
96Inventor score
Top patents by PatentIndex Score
29 records- 0192US6875279B2Single reactor, multi-pressure chemical vapor deposition for semiconductor devicesIBM·Filed 2001·Granted Apr 5, 2005·44 cites·14 claims
- 0289US6858532B2Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related toolingIBM·Filed 2002·Granted Feb 22, 2005·44 cites·19 claims
- 0388US6656809B2Method to fabricate SiGe HBTs with controlled current gain and improved breakdown voltage characteristicsIBM·Filed 2002·Granted Dec 2, 2003·40 cites·9 claims
- 0486US6426265B1Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2001·Granted Jul 30, 2002·25 cites·23 claims
- 0585US6750119B2Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVDIBM·Filed 2001·Granted Jun 15, 2004·22 cites·13 claims
- 0680US7183576B2Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVDIBM·Filed 2004·Granted Feb 27, 2007·14 cites·12 claims
- 0778US6780695B1BiCMOS integration scheme with raised extrinsic baseIBM·Filed 2003·Granted Aug 24, 2004·24 cites·17 claims
- 0877US6744079B2Optimized blocking impurity placement for SiGe HBTsIBM·Filed 2002·Granted Jun 1, 2004·19 cites·12 claims
- 0976US6787427B2Method to fabricate SiGe HBTs with controlled current gain and improved breakdown voltage characteristicsIBM·Filed 2003·Granted Sep 7, 2004·17 cites·11 claims
- 1074US8829572B2Structure and layout of a FET prime cellJAGANNATHAN BASANTH·Filed 2012·Granted Sep 9, 2014·3 cites·20 claims
- 1173US6506656B2Stepped collector implant and method for fabricationIBM·Filed 2001·Granted Jan 14, 2003·18 cites·14 claims
- 1271US7741857B2System and method for de-embedding a device under test employing a parametrized netlistIBM·Filed 2008·Granted Jun 22, 2010·6 cites·20 claims
- 1371US7355221B2Field effect transistor having an asymmetrically stressed channel regionIBM·Filed 2005·Granted Apr 8, 2008·3 cites·10 claims
- 1471US6927476B2Bipolar device having shallow junction raised extrinsic base and method for making the sameIBM·Filed 2001·Granted Aug 9, 2005·16 cites·34 claims
- 1566US7713829B2Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2006·Granted May 11, 2010·1 cites·14 claims
- 1666US6908866B2Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVDIBM·Filed 2004·Granted Jun 21, 2005·6 cites·12 claims
- 1763US8187930B2Structure and layout of a FET prime cellJAGANNATHAN BASANTH·Filed 2007·Granted May 29, 2012·2 cites·22 claims
- 1861US6780735B2Method to increase carbon and boron doping concentrations in Si and SiGe filmsIBM·Filed 2001·Granted Aug 24, 2004·7 cites·9 claims
- 1960US6815802B2Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2002·Granted Nov 9, 2004·5 cites·5 claims
- 2059US11916384B2Region-based power grid generation through modification of an initial power grid based on timing analysisIBM·Filed 2021·Granted Feb 27, 2024·0 cites·20 claims
- 2156US2005145172A1Single reactor, multi-pressure chemical vapor deposition for semiconductor devicesIBM CORP BURLINGTON·Filed 2005·Application pending·0 cites
- 2255US2025212524A1Hybrid high-performance cell with backside contactQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2351US6881259B1In-situ monitoring and control of germanium profile in silicon-germanium alloy films and temperature monitoring during deposition of silicon filmsIBM·Filed 2000·Granted Apr 19, 2005·1 cites·18 claims
- 2446US7173274B2Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2004·Granted Feb 6, 2007·0 cites·10 claims
- 2545US6660607B2Method for fabricating heterojunction bipolar transistorsIBM·Filed 2001·Granted Dec 9, 2003·2 cites·25 claims
- 2642US2006071304A1Structure and layout of a fet prime cellIBM·Filed 2004·Application pending·0 cites
- 2740US9754071B1Integrated circuit (IC) design analysis and feature extractionGLOBALFOUNDRIES INC·Filed 2016·Granted Sep 5, 2017·0 cites·18 claims
- 2839US2004140481A1Optimized blocking impurity placement for SiGe HBTsFiled 2004·Application pending·0 cites
- 2934US2002197807A1Non-self-aligned SiGe heterojunction bipolar transistorIBM·Filed 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →