Inventor · disambiguated record
Jeanne P. Bickford
Also filed as: BICKFORD JEANNE · BICKFORD JEANNE P · BICKFORD JEANNE P S · BICKFORD JEANNE PAULETTE SPENC
74 granted patents·5 pending applications·332 citations·filing 2003–2018
99Inventor score
Top patents by PatentIndex Score
79 records- 0196US8719763B1Frequency selection with selective voltage binningIBM·Filed 2013·Granted May 6, 2014·18 cites·20 claims
- 0294US9104834B2Systems and methods for single cell product path delay analysisIBM·Filed 2014·Granted Aug 11, 2015·20 cites·17 claims
- 0393US8543960B1Power and timing optimization for an integrated circuit by voltage modification across various ranges of temperaturesBICKFORD JEANNE P·Filed 2012·Granted Sep 24, 2013·10 cites·16 claims
- 0493US8539429B1System yield optimization using the results of integrated circuit chip performance path testingBICKFORD JEANNE P·Filed 2012·Granted Sep 17, 2013·11 cites·20 claims
- 0592US9269407B1System and method for managing circuit performance and power consumption by selectively adjusting supply voltage over timeIBM·Filed 2015·Granted Feb 23, 2016·14 cites·20 claims
- 0689US8543966B2Test path selection and test program generation for performance testing integrated circuit chipsBICKFORD JEANNE P·Filed 2011·Granted Sep 24, 2013·8 cites·24 claims
- 0789US8421495B1Speed binning for dynamic and adaptive power controlANEMIKOS THEODOROS E·Filed 2011·Granted Apr 16, 2013·11 cites·24 claims
- 0888US9619609B1Integrated circuit chip design methods and systems using process window-aware timing analysisGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 11, 2017·6 cites·20 claims
- 0987US8839177B1Method and system allowing for semiconductor design rule optimizationIBM·Filed 2013·Granted Sep 16, 2014·13 cites·20 claims
- 1086US9064087B2Semiconductor device reliability model and methodologies for use thereofIBM·Filed 2014·Granted Jun 23, 2015·7 cites·12 claims
- 1185US9767240B2Temperature-aware integrated circuit design methods and systemsGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 19, 2017·7 cites·16 claims
- 1285US7917451B2Methods, apparatus, and program products to optimize semiconductor product yield prediction for performance and leakage screensIBM·Filed 2008·Granted Mar 29, 2011·10 cites·20 claims
- 1384US9772374B2Selective voltage binning leakage screenIBM·Filed 2012·Granted Sep 26, 2017·6 cites·20 claims
- 1483US9552447B2Systems and methods for controlling integrated circuit chip temperature using timing closure-based adaptive frequency scalingGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 24, 2017·4 cites·19 claims
- 1583US8095907B2Reliability evaluation and system fail warning methods using on chip parametric monitorsBICKFORD JEANNE P·Filed 2007·Granted Jan 10, 2012·9 cites·10 claims
- 1682US9058034B2Integrated circuit product yield optimization using the results of performance path testingBICKFORD JEANNE P·Filed 2012·Granted Jun 16, 2015·5 cites·20 claims
- 1781US10067184B2Product performance test binningANEMIKOS THEODOROS·Filed 2011·Granted Sep 4, 2018·4 cites·22 claims
- 1881US7810054B2Method of optimizing power usage of an integrated circuit design by tuning selective voltage binning cut pointIBM·Filed 2008·Granted Oct 5, 2010·11 cites·6 claims
- 1981US7560946B2Method of acceptance for semiconductor devicesIBM·Filed 2007·Granted Jul 14, 2009·10 cites·7 claims
- 2080US9639645B2Integrated circuit chip reliability using reliability-optimized failure mechanism targetingGLOBALFOUNDRIES INC·Filed 2015·Granted May 2, 2017·3 cites·20 claims
- 2180US9157956B2Adaptive power control using timing canonicalsBICKFORD JEANNE P·Filed 2012·Granted Oct 13, 2015·4 cites·24 claims
- 2280US9152168B2Systems and methods for system power estimationBICKFORD JEANNE P·Filed 2012·Granted Oct 6, 2015·9 cites·14 claims
- 2380US8850380B2Selective voltage binning within a three-dimensional integrated chip stackIBM·Filed 2013·Granted Sep 30, 2014·5 cites·8 claims
- 2480US7386815B2Test yield estimate for semiconductor products created from a libraryIBM·Filed 2005·Granted Jun 10, 2008·9 cites·17 claims
- 2579US7656182B2Testing method using a scalable parametric measurement macroIBM·Filed 2007·Granted Feb 2, 2010·9 cites·34 claims
- 2679US7487477B2Parametric-based semiconductor designIBM·Filed 2006·Granted Feb 3, 2009·9 cites·9 claims
- 2778US8302063B2Method and system to optimize semiconductor products for power, performance, noise, and cost through use of variable power supply voltage compressionBICKFORD JEANNE P·Filed 2010·Granted Oct 30, 2012·6 cites·20 claims
- 2878US8234594B2Redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the sameANDERSON BRENT A·Filed 2006·Granted Jul 31, 2012·7 cites·17 claims
- 2976US9740815B2Electromigration-aware integrated circuit design methods and systemsGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 22, 2017·3 cites·20 claims
- 3076US9653330B1Threshold voltage (VT)-type transistor sensitive and/or fan-out sensitive selective voltage binningGLOBALFOUNDRIES INC·Filed 2016·Granted May 16, 2017·2 cites·20 claims
- 3176US8560990B2Method of managing electro migration in logic designs and design structure thereofBARWIN JOHN E·Filed 2010·Granted Oct 15, 2013·5 cites·2 claims
- 3276US8490040B2Disposition of integrated circuits using performance sort ring oscillator and performance path testingBICKFORD JEANNE P·Filed 2011·Granted Jul 16, 2013·3 cites·29 claims
- 3375US9557378B2Method and structure for multi-core chip product test and selective voltage binning dispositionBICKFORD JEANNE P·Filed 2012·Granted Jan 31, 2017·3 cites·25 claims
- 3475US8423945B2Methods and systems to meet technology pattern density requirements of semiconductor fabrication processesBICKFORD JEANNE P·Filed 2010·Granted Apr 16, 2013·7 cites·9 claims
- 3574US9262569B2Balancing sensitivities with respect to timing closure for integrated circuitsIBM·Filed 2014·Granted Feb 16, 2016·3 cites·20 claims
- 3673US9569571B1Method and system for timing violations in a circuitIBM·Filed 2015·Granted Feb 14, 2017·2 cites·11 claims
- 3773US8839165B2Power/performance optimization through continuously variable temperature-based voltage controlIBM·Filed 2013·Granted Sep 16, 2014·3 cites·20 claims
- 3872US7380233B2Method of facilitating integrated circuit design using manufactured property valuesIBM·Filed 2005·Granted May 27, 2008·9 cites·20 claims
- 3970US9536796B2Multiple manufacturing line qualificationIBM·Filed 2013·Granted Jan 3, 2017·2 cites·17 claims
- 4070US8839170B2Power/performance optimization through temperature/voltage controlBICKFORD JEANNE P·Filed 2013·Granted Sep 16, 2014·2 cites·24 claims
- 4170US8578314B1Circuit design with growable capacitor arraysBICKFORD JEANNE P·Filed 2012·Granted Nov 5, 2013·3 cites·11 claims
- 4269US8938701B2Method of managing electro migration in logic designs and design structure thereofIBM·Filed 2013·Granted Jan 20, 2015·2 cites·13 claims
- 4368US9618566B2Systems and methods to prevent incorporation of a used integrated circuit chip into a productGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 11, 2017·1 cites·20 claims
- 4468US7996808B2Computer readable medium, system and associated method for designing integrated circuits with loop insertionsIBM·Filed 2008·Granted Aug 9, 2011·4 cites·8 claims
- 4566US9865486B2Timing/power risk optimized selective voltage binning using non-linear voltage slopeGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 9, 2018·1 cites·15 claims
- 4666US8799836B1Yield optimization for design library elements at library element level or at product levelIBM·Filed 2013·Granted Aug 5, 2014·2 cites·20 claims
- 4766US7013441B2Method for modeling integrated circuit yieldIBM·Filed 2003·Granted Mar 14, 2006·15 cites·31 claims
- 4865US7984394B2Design structure for a redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the sameIBM·Filed 2007·Granted Jul 19, 2011·3 cites·4 claims
- 4965US7487476B2Method for computing the sensitivity of a VLSI design to both random and systematic defects using a critical area analysis toolIBM·Filed 2006·Granted Feb 3, 2009·2 cites·4 claims
- 5064US9171125B2Limiting skew between different device types to meet performance requirements of an integrated circuitIBM·Filed 2014·Granted Oct 27, 2015·1 cites·20 claims
Showing the top 50 of 79 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →