Inventor · disambiguated record
Zehra N. Sura
Also filed as: SURA ZEHRA · SURA ZEHRA N · SURA ZEHRA NOMAN
43 granted patents·6 pending applications·169 citations·filing 2006–2023
97Inventor score
Top patents by PatentIndex Score
49 records- 0196US9513828B2Accessing global data from accelerator devicesIBM·Filed 2015·Granted Dec 6, 2016·36 cites·8 claims
- 0294US9563428B2Schedulers with load-store queue awarenessIBM·Filed 2015·Granted Feb 7, 2017·13 cites·7 claims
- 0391US11727309B2Runtime estimation for machine learning tasksIBM·Filed 2021·Granted Aug 15, 2023·3 cites·20 claims
- 0488US8146064B2Dynamically controlling a prefetching range of a software controlled cacheCHEN TONG·Filed 2008·Granted Mar 27, 2012·21 cites·20 claims
- 0585US9658940B2Method to efficiently implement synchronization using software managed address translationIBM·Filed 2015·Granted May 23, 2017·4 cites·20 claims
- 0685US8561044B2Optimized code generation targeting a high locality software cacheCHEN TONG·Filed 2008·Granted Oct 15, 2013·15 cites·19 claims
- 0784US8997071B2Optimized division of work among processors in a heterogeneous processing systemCHEN TONG·Filed 2012·Granted Mar 31, 2015·7 cites·22 claims
- 0883US11687369B2Flexible optimized data handling in systems with multiple memoriesIBM·Filed 2021·Granted Jun 27, 2023·1 cites·16 claims
- 0980US8561043B2Data transfer optimized software cache for irregular memory referencesAYGUADE EDUARD·Filed 2008·Granted Oct 15, 2013·13 cites·18 claims
- 1080US7502890B2Method and apparatus for dynamic priority-based cache replacementIBM·Filed 2006·Granted Mar 10, 2009·13 cites·20 claims
- 1179US10782973B2Optimizing branch re-wiring in a software instruction cacheIBM·Filed 2015·Granted Sep 22, 2020·3 cites·1 claims
- 1273US11416548B2Index management for a databaseIBM·Filed 2019·Granted Aug 16, 2022·1 cites·20 claims
- 1373US8527974B2Data transfer optimized software cache for regular memory referencesAYGUADE EDUARD·Filed 2008·Granted Sep 3, 2013·8 cites·23 claims
- 1473US2023244530A1Flexible optimized data handling in systems with multiple memoriesIBM·Filed 2023·Application pending·0 cites
- 1572US10223260B2Compiler-generated memory mapping hintsIBM·Filed 2014·Granted Mar 5, 2019·2 cites·20 claims
- 1672US8239841B2Prefetching irregular data references for software controlled cachesCHEN TONG·Filed 2008·Granted Aug 7, 2012·5 cites·17 claims
- 1772US7784037B2Compiler implemented software cache method in which non-aliased explicitly fetched data are excludedIBM·Filed 2006·Granted Aug 24, 2010·5 cites·1 claims
- 1869US8762968B2Prefetching irregular data references for software controlled cachesCHEN TONG·Filed 2012·Granted Jun 24, 2014·2 cites·14 claims
- 1969US8468531B2Method and apparatus for efficient inter-thread synchronization for helper threadsGSCHWIND MICHAEL K·Filed 2010·Granted Jun 18, 2013·2 cites·16 claims
- 2068US8453161B2Method and apparatus for efficient helper thread state initialization using inter-thread register copyGSCHWIND MICHAEL K·Filed 2010·Granted May 28, 2013·2 cites·21 claims
- 2168US8055849B2Reducing cache pollution of a software controlled cacheIBM·Filed 2008·Granted Nov 8, 2011·4 cites·20 claims
- 2267US10996989B2Flexible optimized data handling in systems with multiple memoriesIBM·Filed 2016·Granted May 4, 2021·1 cites·19 claims
- 2366US9792098B2Unaligned instruction relocationIBM·Filed 2015·Granted Oct 17, 2017·1 cites·6 claims
- 2466US8214816B2Compiler implemented software cache in which non-aliased explicitly fetched data are excludedCHEN TONG·Filed 2008·Granted Jul 3, 2012·3 cites·19 claims
- 2562US8495307B2Target memory hierarchy specification in a multi-core computer processing systemCHEN TONG·Filed 2010·Granted Jul 23, 2013·2 cites·16 claims
- 2660US7836256B2Method and apparatus for application-specific dynamic cache placementIBM·Filed 2008·Granted Nov 16, 2010·2 cites·16 claims
- 2756US10223091B2Unaligned instruction relocationIBM·Filed 2017·Granted Mar 5, 2019·0 cites·9 claims
- 2856US10083125B2Method to efficiently implement synchronization using software managed address translationIBM·Filed 2017·Granted Sep 25, 2018·0 cites·20 claims
- 2955US9229715B2Method and apparatus for efficient inter-thread synchronization for helper threadsIBM·Filed 2013·Granted Jan 5, 2016·0 cites·18 claims
- 3054US9110734B2Power-constrained compiler code generation and scheduling of work in a heterogeneous processing systemIBM·Filed 2012·Granted Aug 18, 2015·0 cites·25 claims
- 3153US9183063B2Power-constrained compiler code generation and scheduling of work in a heterogeneous processing systemIBM·Filed 2012·Granted Nov 10, 2015·0 cites·25 claims
- 3252US9875089B2Unaligned instruction relocationIBM·Filed 2015·Granted Jan 23, 2018·0 cites·3 claims
- 3352US8930921B2Compilation and placement of instructions in a memory systemIBM·Filed 2012·Granted Jan 6, 2015·0 cites·17 claims
- 3452US8914779B2Data placement for execution of an executableIBM·Filed 2012·Granted Dec 16, 2014·0 cites·16 claims
- 3552US8914778B2Data placement for execution of an executableIBM·Filed 2012·Granted Dec 16, 2014·0 cites·18 claims
- 3652US8863099B2Compilation and placement of instructions in a memory systemIBM·Filed 2012·Granted Oct 14, 2014·0 cites·18 claims
- 3751US11200512B2Runtime estimation for machine learning tasksIBM·Filed 2018·Granted Dec 14, 2021·0 cites·20 claims
- 3851US10824481B2Partial synchronization between compute tasks based on threshold specification in a computing systemIBM·Filed 2018·Granted Nov 3, 2020·0 cites·17 claims
- 3950US11403213B2Reducing fragmentation of computer memoryIBM·Filed 2019·Granted Aug 2, 2022·0 cites·25 claims
- 4050US9513832B2Accessing global data from accelerator devicesIBM·Filed 2015·Granted Dec 6, 2016·0 cites·12 claims
- 4150US2014068581A1Optimized division of work among processors in a heterogeneous processing systemCHEN TONG·Filed 2012·Application pending·0 cites
- 4249US9772825B2Program structure-based blockingIBM·Filed 2015·Granted Sep 26, 2017·0 cites·4 claims
- 4349US9552196B2Schedulers with load-store queue awarenessIBM·Filed 2015·Granted Jan 24, 2017·0 cites·4 claims
- 4448US9772824B2Program structure-based blockingIBM·Filed 2015·Granted Sep 26, 2017·0 cites·8 claims
- 4545US2008010413A1Method and apparatus for application-specific dynamic cache placementKAILAS KRISHNAN KUNJUNNY·Filed 2006·Application pending·0 cites
- 4644US11568235B2Data driven mixed precision learning for neural networksIBM·Filed 2018·Granted Jan 31, 2023·0 cites·18 claims
- 4743US2008005473A1Compiler assisted re-configurable software implemented cacheCHEN TONG·Filed 2006·Application pending·0 cites
- 4838US2019354851A1Construction of a machine learning model for structured inputsIBM·Filed 2018·Application pending·0 cites
- 4937US2011093838A1Managing speculative assist threadsIBM·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →