Inventor · disambiguated record
Sanford Chu
Also filed as: CHU SANFORD · CHU SANFORD SHAO-FU
51 granted patents·6 pending applications·771 citations·filing 2000–2015
98Inventor score
Files withCHARTERED SEMICONDUCTOR MFG34GLOBALFOUNDRIES SG PTE LTD9CHU SANFORD3GLOBALFOUNDRIES INC3TAN CHUNG FOONG3
Top patents by PatentIndex Score
57 records- 0192US7846805B2Self-aligned vertical PNP transistor for high performance SiGe CBiCMOS processCHARTERED SEMICONDUCTOR MFG·Filed 2009·Granted Dec 7, 2010·19 cites·38 claims
- 0292US6730573B1MIM and metal resistor formation at CU beol using only one extra maskCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted May 4, 2004·96 cites·31 claims
- 0390US6576526B2Darc layer for MIM process integrationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 10, 2003·93 cites·21 claims
- 0490US6300201B1Method to form a high K dielectric gate insulator layer, a metal gate structure, and self-aligned channel regions, post source/drain formationCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Oct 9, 2001·70 cites·27 claims
- 0589US8349692B2Channel surface technique for fabrication of FinFET devicesGLOBALFOUNDRIES SG PTE LTD·Filed 2011·Granted Jan 8, 2013·9 cites·18 claims
- 0689US8324031B2Diffusion barrier and method of formation thereofTAN SHYUE SENG·Filed 2008·Granted Dec 4, 2012·10 cites·7 claims
- 0789US7488662B2Self-aligned vertical PNP transistor for high performance SiGe CBiCMOS processCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Feb 10, 2009·15 cites·14 claims
- 0888US7824968B2LDMOS using a combination of enhanced dielectric stress layer and dummy gatesCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Nov 2, 2010·14 cites·44 claims
- 0988US6716693B1Method of forming a surface coating layer within an opening within a body by atomic layer depositionCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Apr 6, 2004·49 cites·28 claims
- 1087US6903013B2Method to fill a trench and tunnel by using ALD seed layer and electroless platingCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jun 7, 2005·44 cites·54 claims
- 1187US6746914B2Metal sandwich structure for MIM capacitor onto dual damasceneCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jun 8, 2004·56 cites·53 claims
- 1286US9583557B2Integrated circuits including a MIMCAP device and methods of forming the same for long and controllable reliability lifetimeGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 28, 2017·5 cites·14 claims
- 1382US6714112B2Silicon-based inductor with varying metal-to-metal conductor spacingCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Mar 30, 2004·37 cites·25 claims
- 1482US6638844B1Method of reducing substrate coupling/noise for radio frequency CMOS (RFCMOS) components in semiconductor technology by backside trench and fillCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Oct 28, 2003·29 cites·70 claims
- 1581US8896072B2Channel surface technique for fabrication of FinFET devicesTAN CHUNG FOONG·Filed 2013·Granted Nov 25, 2014·5 cites·20 claims
- 1679US10115719B2Integrated circuits with resistor structures formed from MIM capacitor material and methods for fabricating sameGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 30, 2018·3 cites·17 claims
- 1778US8293614B2High performance LDMOS device having enhanced dielectric strain layerCHU SANFORD·Filed 2011·Granted Oct 23, 2012·5 cites·10 claims
- 1877US6777774B2Low noise inductor using electrically floating high resistive and grounded low resistive patterned shieldCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Aug 17, 2004·29 cites·31 claims
- 1976US7323736B2Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Jan 29, 2008·4 cites·44 claims
- 2076US6835631B1Method to enhance inductor Q factor by forming air gaps below inductorsCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Dec 28, 2004·26 cites·63 claims
- 2173US8003529B2Method of fabrication an integrated circuitGLOBALFOUNDRIES SG PTE LTD·Filed 2010·Granted Aug 23, 2011·3 cites·26 claims
- 2273US7410874B2Method of integrating triple gate oxide thicknessCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Aug 12, 2008·7 cites·18 claims
- 2372US9530833B2Semiconductor structure including capacitors having different capacitor dielectrics and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2014·Granted Dec 27, 2016·3 cites·20 claims
- 2472US8383475B2EEPROM cellGLOBALFOUNDRIES SG PTE LTD·Filed 2010·Granted Feb 26, 2013·3 cites·25 claims
- 2572US8110470B2Asymmetrical transistor device and method of fabricationTAN CHUNG FOONG·Filed 2009·Granted Feb 7, 2012·4 cites·27 claims
- 2672US6825080B1Method for forming a MIM capacitorCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Nov 30, 2004·26 cites·17 claims
- 2771US8334567B2LDMOS using a combination of enhanced dielectric stress layer and dummy gatesCHU SANFORD·Filed 2010·Granted Dec 18, 2012·3 cites·20 claims
- 2871US7382027B2MOSFET device with low gate contact resistanceCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Jun 3, 2008·4 cites·23 claims
- 2969US8410553B2Semiconductor structure including high voltage deviceKOO JEOUNG MO·Filed 2010·Granted Apr 2, 2013·3 cites·20 claims
- 3069US6486017B1Method of reducing substrate coupling for chip inductors by creation of dielectric islands by selective EPI depositionCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Nov 26, 2002·15 cites·30 claims
- 3164US6861317B1Method of making direct contact on gate by using dielectric stop layerCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Mar 1, 2005·10 cites·16 claims
- 3264US6852605B2Method of forming an inductor with continuous metal depositionCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Feb 8, 2005·10 cites·17 claims
- 3364US6375857B1Method to form fuse using polymeric filmsCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 23, 2002·12 cites·13 claims
- 3462US8629503B2Asymmetrical transistor device and method of fabricationTAN CHUNG FOONG·Filed 2012·Granted Jan 14, 2014·1 cites·20 claims
- 3562US6869884B2Process to reduce substrate effects by forming channels under inductor devices and around analog blocksCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Mar 22, 2005·7 cites·90 claims
- 3661US7250669B2Process to reduce substrate effects by forming channels under inductor devices and around analog blocksCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Jul 31, 2007·6 cites·34 claims
- 3760US8163621B2High performance LDMOS device having enhanced dielectric strain layerCHU SANFORD·Filed 2008·Granted Apr 24, 2012·2 cites·8 claims
- 3860US6933188B1Use of a selective hard mask for the integration of double diffused drain MOS devices in deep sub-micron fabrication technologiesCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Aug 23, 2005·8 cites·28 claims
- 3958US7652355B2Integrated circuit shield structureCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Jan 26, 2010·1 cites·21 claims
- 4057US7867862B2Semiconductor structure including high voltage deviceCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Jan 11, 2011·1 cites·19 claims
- 4157US6608362B1Method and device for reducing capacitive and magnetic effects from a substrate by using a schottky diode under passive componentsCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Aug 19, 2003·8 cites·17 claims
- 4257US2015008528A1Diffusion barrier and method of formation thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Application pending·0 cites
- 4356US8664711B2Dielectric stackGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Mar 4, 2014·0 cites·20 claims
- 4455US8664708B2EEPROM cellGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Mar 4, 2014·1 cites·20 claims
- 4555US6780727B2Method for forming a MIM (metal-insulator-metal) capacitorCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Aug 24, 2004·8 cites·12 claims
- 4654US8383476B2EEPROM cellGLOBALFOUNDRIES SG PTE LTD·Filed 2010·Granted Feb 26, 2013·1 cites·21 claims
- 4753US7060193B2Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jun 13, 2006·3 cites·60 claims
- 4853US2013087889A1Diffusion barrier and method of formation thereofGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Application pending·0 cites
- 4952US6821904B2Method of blocking nitrogen from thick gate oxide during dual gate CMPCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Nov 23, 2004·3 cites·34 claims
- 5050US8659067B2EEPROM cellGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Feb 25, 2014·0 cites·20 claims
Showing the top 50 of 57 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →