Inventor · disambiguated record
Rama Divakaruni
Also filed as: DIVAKARUNI RAMA
53 granted patents·5 pending applications·2,344 citations·filing 1999–2019
99Inventor score
Top patents by PatentIndex Score
58 records- 0199US7030481B2High density chip carrier with integrated passive devicesIBM·Filed 2002·Granted Apr 18, 2006·401 cites·52 claims
- 0299US6962872B2High density chip carrier with integrated passive devicesIBM·Filed 2004·Granted Nov 8, 2005·363 cites·29 claims
- 0398US6472258B1Double gate trench transistorIBM·Filed 2000·Granted Oct 29, 2002·162 cites·9 claims
- 0498US6429477B1Shared body and diffusion contact structure and method for fabricating sameIBM·Filed 2000·Granted Aug 6, 2002·228 cites·10 claims
- 0597US9685535B1Conductive contacts in semiconductor on insulator substrateIBM·Filed 2016·Granted Jun 20, 2017·15 cites·17 claims
- 0697US6864540B1High performance FET with elevated source/drain regionIBM·Filed 2004·Granted Mar 8, 2005·130 cites·26 claims
- 0794US6498061B2Negative ion implant mask formation for self-aligned, sublithographic resolution patterning for single-sided vertical device formationIBM·Filed 2000·Granted Dec 24, 2002·66 cites·11 claims
- 0892US6940149B1Structure and method of forming a bipolar transistor having a void between emitter and extrinsic baseIBM·Filed 2004·Granted Sep 6, 2005·64 cites·20 claims
- 0991US6998666B2Nitrided STI liner oxide for reduced corner device impact on vertical device performanceIBM·Filed 2004·Granted Feb 14, 2006·46 cites·14 claims
- 1090US6869860B2Filling high aspect ratio isolation structures with polysilazane based materialIBM·Filed 2003·Granted Mar 22, 2005·35 cites·10 claims
- 1190US6635526B1Structure and method for dual work function logic devices in vertical DRAM processINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 21, 2003·57 cites·20 claims
- 1289US6897107B2Method for forming TTO nitride liner for improved collar protection and TTO reliabilityINFINEON TECHNOLOGIES CORP·Filed 2003·Granted May 24, 2005·38 cites·10 claims
- 1387US6501131B1Transistors having independently adjustable parametersIBM·Filed 1999·Granted Dec 31, 2002·95 cites·15 claims
- 1486US7462547B2Method of fabricating a bipolar transistor having reduced collector-base capacitanceIBM·Filed 2006·Granted Dec 9, 2008·12 cites·16 claims
- 1586US6441423B1Trench capacitor with an intrinsically balanced field across the dielectricIBM·Filed 2000·Granted Aug 27, 2002·31 cites·16 claims
- 1685US10734410B2Conductive contacts in semiconductor on insulator substrateEPLIS TECH INC·Filed 2017·Granted Aug 4, 2020·4 cites·14 claims
- 1785US6566228B1Trench isolation processes using polysilicon-assisted fillIBM·Filed 2002·Granted May 20, 2003·40 cites·20 claims
- 1884US7615457B2Method of fabricating self-aligned bipolar transistor having tapered collectorIBM·Filed 2008·Granted Nov 10, 2009·9 cites·8 claims
- 1984US6746933B1Pitcher-shaped active area for field effect transistor and method of forming sameIBM·Filed 2001·Granted Jun 8, 2004·35 cites·12 claims
- 2084US6605838B1Process flow for thick isolation collar with reduced lengthIBM·Filed 2002·Granted Aug 12, 2003·39 cites·20 claims
- 2184US6509624B1Semiconductor fuses and antifuses in vertical DRAMSIBM·Filed 2000·Granted Jan 21, 2003·37 cites·11 claims
- 2283US6806138B1Integration scheme for enhancing capacitance of trench capacitorsIBM·Filed 2004·Granted Oct 19, 2004·31 cites·24 claims
- 2383US6281539B1Structure and process for 6F2 DT cell having vertical MOSFET and large storage capacitanceIBM·Filed 2000·Granted Aug 28, 2001·31 cites·18 claims
- 2482US6373086B1Notched collar isolation for suppression of vertical parasitic MOSFET and the method of preparing the sameIBM·Filed 2000·Granted Apr 16, 2002·30 cites·9 claims
- 2580US7265417B2Method of fabricating semiconductor side wall finIBM·Filed 2004·Granted Sep 4, 2007·20 cites·12 claims
- 2679US6288422B1Structure and process for fabricating a 6F2 DRAM cell having vertical MOSFET and large trench capacitanceIBM·Filed 2000·Granted Sep 11, 2001·26 cites·19 claims
- 2778US6809368B2TTO nitride liner for improved collar protection and TTO reliabilityIBM·Filed 2001·Granted Oct 26, 2004·15 cites·4 claims
- 2877US7361556B2Method of fabricating semiconductor side wall finIBM·Filed 2006·Granted Apr 22, 2008·5 cites·10 claims
- 2977US7190046B2Bipolar transistor having reduced collector-base capacitanceIBM·Filed 2004·Granted Mar 13, 2007·19 cites·18 claims
- 3076US7170126B2Structure of vertical strained silicon devicesIBM·Filed 2003·Granted Jan 30, 2007·16 cites·14 claims
- 3173US6404000B1Pedestal collar structure for higher charge retention time in trench-type DRAM cellsIBM·Filed 2000·Granted Jun 11, 2002·17 cites·19 claims
- 3272US6821857B1High on-current device for high performance embedded DRAM (eDRAM) and method of forming the sameIBM·Filed 2003·Granted Nov 23, 2004·14 cites·6 claims
- 3370US7425754B2Structure and method of self-aligned bipolar transistor having tapered collectorIBM·Filed 2004·Granted Sep 16, 2008·13 cites·5 claims
- 3470US6964892B2N-channel metal oxide semiconductor (NMOS) driver circuit and method of making sameIBM·Filed 2002·Granted Nov 15, 2005·10 cites·25 claims
- 3570US6620676B2Structure and methods for process integration in vertical DRAM cell fabricationIBM·Filed 2001·Granted Sep 16, 2003·14 cites·10 claims
- 3669US6184107B1Capacitor trench-top dielectric for self-aligned device isolationIBM·Filed 1999·Granted Feb 6, 2001·37 cites·7 claims
- 3768US6724053B1PMOSFET device with localized nitrogen sidewall implantationIBM·Filed 2000·Granted Apr 20, 2004·12 cites·9 claims
- 3866US11177285B2Conductive contacts in semiconductor on insulator substrateELPIS TECH INC·Filed 2019·Granted Nov 16, 2021·0 cites·14 claims
- 3966US6790739B2Structure and methods for process integration in vertical DRAM cell fabricationIBM·Filed 2003·Granted Sep 14, 2004·11 cites·10 claims
- 4066US6762447B1Field-shield-trench isolation for gigabit DRAMsINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Jul 13, 2004·33 cites·15 claims
- 4165US6340615B1Method of forming a trench capacitor DRAM cellIBM·Filed 1999·Granted Jan 22, 2002·21 cites·6 claims
- 4264US6433397B1N-channel metal oxide semiconductor (NMOS) driver circuit and method of making sameIBM·Filed 2000·Granted Aug 13, 2002·7 cites·18 claims
- 4363US6960514B2Pitcher-shaped active area for field effect transistor and method of forming sameIBM·Filed 2004·Granted Nov 1, 2005·9 cites·12 claims
- 4461US7163864B1Method of fabricating semiconductor side wall finIBM·Filed 2000·Granted Jan 16, 2007·7 cites·8 claims
- 4557US6348394B1Method and device for array threshold voltage control by trapped charge in trench isolationIBM·Filed 2000·Granted Feb 19, 2002·7 cites·21 claims
- 4657US2005179112A1Filling high aspect ratio isolation structures with polysilazane based materialIBM·Filed 2005·Application pending·0 cites
- 4756US7566599B2High performance FET with elevated source/drain regionIBM·Filed 2004·Granted Jul 28, 2009·5 cites·25 claims
- 4855US6197632B1Method for dual sidewall oxidation in high density, high performance DRAMSIBM·Filed 1999·Granted Mar 6, 2001·14 cites·12 claims
- 4953US9673222B2Fin isolation structures facilitating different fin isolation schemesGLOBALFOUNDRIES INC·Filed 2016·Granted Jun 6, 2017·0 cites·19 claims
- 5052US6890815B2Reduced cap layer erosion for borderless contactsIBM·Filed 2003·Granted May 10, 2005·5 cites·25 claims
Showing the top 50 of 58 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Rama Divakaruni files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →