Inventor · disambiguated record
Hidekazu Egawa
Also filed as: EGAWA HIDEKAZU
8 granted patents·3 pending applications·101 citations·filing 1999–2023
86Inventor score
Top patents by PatentIndex Score
11 records- 0180US6518835B2Semiconductor integrated circuit device having an optimal circuit layout to ensure stabilization of internal source voltages without lowering circuit functions and/or operating performanceHITACHI LTD·Filed 2002·Granted Feb 11, 2003·26 cites·12 claims
- 0277US6707139B2Semiconductor device with plural unit regions in which one or more MOSFETs are formedHITACHI LTD·Filed 2001·Granted Mar 16, 2004·23 cites·3 claims
- 0367US8879297B2Semiconductor device having multi-level wiring structurePS4 LUXCO SARL·Filed 2012·Granted Nov 4, 2014·3 cites·8 claims
- 0464US6274895B1Semiconductor integrated circuit deviceHITACHI LTD·Filed 1999·Granted Aug 14, 2001·27 cites·18 claims
- 0558US6411160B1Semiconductor integrated circuit deviceHITACHI LTD·Filed 1999·Granted Jun 25, 2002·20 cites·20 claims
- 0657US2024250021A1Apparatus and internal voltage generating circuit including voltage dividing circuitMICRON TECHNOLOGY INC·Filed 2023·Application pending·0 cites
- 0750US7710142B2Semiconductor integrated circuitELPIDA MEMORY INC·Filed 2008·Granted May 4, 2010·2 cites·12 claims
- 0843US2015055393A1Semiconductor Device Having Multi-Level Wiring StructurePS4 LUXCO SARL·Filed 2014·Application pending·0 cites
- 0933US9443573B2Semiconductor device including main amplifers between memory cell arraysEGAWA HIDEKAZU·Filed 2014·Granted Sep 13, 2016·0 cites·20 claims
- 1033US8451676B2Semiconductor device with signal lines and shield linesEGAWA HIDEKAZU·Filed 2009·Granted May 28, 2013·0 cites·30 claims
- 1133US2011065249A1Method of manufacturing a semiconductor device in which an increase in area of the semiconductor device is suppressedELPIDA MEMORY INC·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →