Inventor · disambiguated record
Nicolas Gani
Also filed as: GANI NICOLAS
13 granted patents·7 pending applications·222 citations·filing 2001–2016
92Inventor score
Top patents by PatentIndex Score
20 records- 0197US6818562B2Method and apparatus for tuning an RF matching network in a plasma enhanced semiconductor wafer processing systemAPPLIED MATERIALS INC·Filed 2002·Granted Nov 16, 2004·94 cites·12 claims
- 0293US7436645B2Method and apparatus for controlling temperature of a substrateAPPLIED MATERIALS INC·Filed 2006·Granted Oct 14, 2008·37 cites·14 claims
- 0391US9230819B2Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processingLAM RES CORP·Filed 2014·Granted Jan 5, 2016·15 cites·30 claims
- 0490US9633846B2Internal plasma grid applications for semiconductor fabricationLAM RES CORP·Filed 2015·Granted Apr 25, 2017·8 cites·23 claims
- 0586US9305797B2Polysilicon over-etch using hydrogen diluted plasma for three-dimensional gate etchAPPLIED MATERIALS INC·Filed 2014·Granted Apr 5, 2016·8 cites·14 claims
- 0680US6599437B2Method of etching organic antireflection coating (ARC) layersAPPLIED MATERIALS INC·Filed 2001·Granted Jul 29, 2003·25 cites·36 claims
- 0776US7648914B2Method for etching having a controlled distribution of process resultsAPPLIED MATERIALS INC·Filed 2006·Granted Jan 19, 2010·6 cites·20 claims
- 0871US8722547B2Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistriesMANI RADHIKA·Filed 2007·Granted May 13, 2014·5 cites·11 claims
- 0970US8133817B2Shallow trench isolation etch processSASANO HIROKI·Filed 2008·Granted Mar 13, 2012·7 cites·23 claims
- 1066US8101525B2Method for fabricating a semiconductor device having a lanthanum-family-based oxide layerSHEN MEIHUA·Filed 2009·Granted Jan 24, 2012·4 cites·21 claims
- 1162US7910488B2Alternative method for advanced CMOS logic gate etch applicationsAPPLIED MATERIALS INC·Filed 2007·Granted Mar 22, 2011·1 cites·30 claims
- 1259US9533332B2Methods for in-situ chamber clean utilized in an etching processing chamberSUN NOEL·Filed 2012·Granted Jan 3, 2017·4 cites·14 claims
- 1359US6933243B2High selectivity and residue free process for metal on thin dielectric gate etch applicationAPPLIED MATERIALS INC·Filed 2002·Granted Aug 23, 2005·8 cites·18 claims
- 1453US2009221150A1Etch rate and critical dimension uniformity by selection of focus ring materialAPPLIED MATERIALS INC·Filed 2009·Application pending·0 cites
- 1548US2009221149A1Multiple port gas injection system utilized in a semiconductor processing systemHAMMOND IV EDWARD P·Filed 2008·Application pending·0 cites
- 1647US2017011891A1Etch rate and critical dimension uniformity by selection of focus ring materialAPPLIED MATERIALS INC·Filed 2016·Application pending·0 cites
- 1743US2008286978A1Etching and passivating for high aspect ratio featuresCHEN RONG·Filed 2007·Application pending·0 cites
- 1838US2012088371A1Methods for etching substrates using pulsed dc voltageRANJAN ALOK·Filed 2011·Application pending·0 cites
- 1935US2004018739A1Methods for etching using building blocksAPPLIED MATERIALS INC·Filed 2002·Application pending·0 cites
- 2030US2004152331A1Process for etching polysilicon gates with good mask selectivity, critical dimension control, and cleanlinessAPPLIED MATERIALS INC·Filed 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →