Inventor · disambiguated record
Shashank Deshmukh
Also filed as: DESHMUKH SHASHANK · DESHMUKH SHASHANK C
24 granted patents·10 pending applications·600 citations·filing 1996–2022
96Inventor score
Top patents by PatentIndex Score
34 records- 0199US9396961B2Integrated etch/clean for dielectric etch applicationsLAM RES CORP·Filed 2015·Granted Jul 19, 2016·105 cites·26 claims
- 0297US7718538B2Pulsed-plasma system with pulsed sample bias for etching semiconductor substratesAPPLIED MATERIALS INC·Filed 2007·Granted May 18, 2010·109 cites·9 claims
- 0393US7737042B2Pulsed-plasma system for etching semiconductor structuresAPPLIED MATERIALS INC·Filed 2007·Granted Jun 15, 2010·23 cites·9 claims
- 0492US7771606B2Pulsed-plasma system with pulsed reaction gas replenish for etching semiconductors structuresAPPLIED MATERIALS INC·Filed 2007·Granted Aug 10, 2010·22 cites·18 claims
- 0586US5978202AElectrostatic chuck having a thermal transfer regulator padAPPLIED MATERIALS INC·Filed 1997·Granted Nov 2, 1999·81 cites·38 claims
- 0683US7504338B2Method of pattern etching a silicon-containing hard maskAPPLIED MATERIALS INC·Filed 2006·Granted Mar 17, 2009·9 cites·33 claims
- 0781US7122125B2Controlled polymerization on plasma reactor wallAPPLIED MATERIALS INC·Filed 2002·Granted Oct 17, 2006·25 cites·17 claims
- 0880US6235214B1Plasma etching of silicon using fluorinated gas mixturesAPPLIED MATERIALS INC·Filed 1999·Granted May 22, 2001·54 cites·27 claims
- 0977US9079228B2Methodology for cleaning of surface metal contamination from an upper electrode used in a plasma chamberSHIH HONG·Filed 2010·Granted Jul 14, 2015·2 cites·13 claims
- 1077US6924088B2Method and system for realtime CD microloading controlAPPLIED MATERIALS INC·Filed 2003·Granted Aug 2, 2005·19 cites·59 claims
- 1174US6921723B1Etching method having high silicon-to-photoresist selectivityAPPLIED MATERIALS INC·Filed 2002·Granted Jul 26, 2005·20 cites·32 claims
- 1272US8501626B2Methods for high temperature etching a high-K material gate structureLIU WEI·Filed 2008·Granted Aug 6, 2013·4 cites·13 claims
- 1371US10361091B2Porous low-k dielectric etchLAM RES CORP·Filed 2017·Granted Jul 23, 2019·2 cites·17 claims
- 1471US8722547B2Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistriesMANI RADHIKA·Filed 2007·Granted May 13, 2014·5 cites·11 claims
- 1570US8133817B2Shallow trench isolation etch processSASANO HIROKI·Filed 2008·Granted Mar 13, 2012·7 cites·23 claims
- 1670US6653237B2High resist-selectivity etch for silicon trench etch applicationsAPPLIED MATERIALS INC·Filed 2001·Granted Nov 25, 2003·13 cites·23 claims
- 1767US7780862B2Device and method for etching flash memory gate stacks comprising high-k dielectricAPPLIED MATERIALS INC·Filed 2006·Granted Aug 24, 2010·2 cites·11 claims
- 1867US5893643AApparatus for measuring pedestal temperature in a semiconductor wafer processing systemAPPLIED MATERIALS INC·Filed 1997·Granted Apr 13, 1999·37 cites·15 claims
- 1964US7754610B2Process for etching tungsten silicide overlying polysilicon particularly in a flash memoryAPPLIED MATERIALS INC·Filed 2006·Granted Jul 13, 2010·2 cites·35 claims
- 2062US7910488B2Alternative method for advanced CMOS logic gate etch applicationsAPPLIED MATERIALS INC·Filed 2007·Granted Mar 22, 2011·1 cites·30 claims
- 2161US6402974B1Method for etching polysilicon to have a smooth surfaceAPPLIED MATERIALS INC·Filed 1999·Granted Jun 11, 2002·26 cites·16 claims
- 2261US5851926AMethod for etching transistor gates using a hardmaskAPPLIED MATERIALS INC·Filed 1996·Granted Dec 22, 1998·25 cites·5 claims
- 2356US7368392B2Method of fabricating a gate structure of a field effect transistor having a metal-containing gate electrodeAPPLIED MATERIALS INC·Filed 2004·Granted May 6, 2008·7 cites·41 claims
- 2451US2008011423A1Device and method for etching flash memory gate stacks comprising high-k dielectricAPPLIED MATERIALS INC·Filed 2007·Application pending·0 cites
- 2551US2023268192A1In-situ hydrocarbon-based layer for non-conformal passivation of partially etched structuresLAM RES CORP·Filed 2022·Application pending·0 cites
- 2649US8956500B2Methods to eliminate “M-shape” etch rate profile in inductively coupled plasma reactorYUEN STEPHEN·Filed 2007·Granted Feb 17, 2015·0 cites·7 claims
- 2747US2013344701A1Methods for high temperature etching a high-k gate structureLIU WEI·Filed 2013·Application pending·0 cites
- 2847US2007281479A1Process including silo-chloro passivation for etching tungsten silicide overlying polysiliconAPPLIED MATERIALS INC·Filed 2006·Application pending·0 cites
- 2939US2005070103A1Method and apparatus for endpoint detection during an etch processAPPLIED MATERIALS INC·Filed 2003·Application pending·0 cites
- 3037US2004087153A1Method of etching a silicon-containing dielectric materialDU YAN·Filed 2002·Application pending·0 cites
- 3137US2004018741A1Method For Enhancing Critical Dimension Uniformity After EtchAPPLIED MATERIALS INC·Filed 2002·Application pending·0 cites
- 3237US2004018647A1Method for controlling the extent of notch or undercut in an etched profile using optical reflectometryAPPLIED MATERIALS INC·Filed 2003·Application pending·0 cites
- 3336US2004084411A1Method of etching a silicon-containing dielectric materialAPPLIED MATERIALS INC·Filed 2002·Application pending·0 cites
- 3435US2004018739A1Methods for etching using building blocksAPPLIED MATERIALS INC·Filed 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →