Inventor · disambiguated record
Henry Y. Lui
Also filed as: LUI HENRY · LUI HENRY Y
25 granted patents·1 pending application·644 citations·filing 1995–2016
97Inventor score
Top patents by PatentIndex Score
26 records- 0196US5568081AVariable slew control for output buffersCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Oct 22, 1996·166 cites·12 claims
- 0295US8751551B2Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitryALTERA CORP·Filed 2013·Granted Jun 10, 2014·32 cites·10 claims
- 0393US6724328B1Byte alignment for serial data receiverALTERA CORP·Filed 2003·Granted Apr 20, 2004·99 cites·29 claims
- 0492US8645450B1Multiplier-accumulator circuitry and methodsCHOE KOK HENG·Filed 2007·Granted Feb 4, 2014·34 cites·16 claims
- 0592US7046174B1Byte alignment for serial data receiverALTERA CORP·Filed 2005·Granted May 16, 2006·31 cites·25 claims
- 0689US8812893B1Apparatus and methods for low-skew channel bondingVENKATA RAMANAND·Filed 2012·Granted Aug 19, 2014·14 cites·13 claims
- 0789US8571059B1Apparatus and methods for serial interfaces with shared datapathsZALIZNYAK ARCH·Filed 2011·Granted Oct 29, 2013·17 cites·18 claims
- 0889US8307023B1DSP block for implementing large multiplier on a programmable integrated circuit deviceLEUNG WAI-BOR·Filed 2008·Granted Nov 6, 2012·32 cites·29 claims
- 0989US7570105B1Variable current charge pump with modular switch circuitALTERA CORP·Filed 2007·Granted Aug 4, 2009·20 cites·22 claims
- 1088US7227918B2Clock data recovery circuitry associated with programmable logic device circuitryALTERA CORP·Filed 2001·Granted Jun 5, 2007·62 cites·138 claims
- 1184US8700825B1Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution systemALTERA CORP·Filed 2012·Granted Apr 15, 2014·6 cites·25 claims
- 1283US7003423B1Programmable logic resource with data transfer synchronizationALTERA CORP·Filed 2003·Granted Feb 21, 2006·44 cites·23 claims
- 1382US7684532B2Clock data recovery circuitry associated with programmable logic device circuitryALTERA CORP·Filed 2007·Granted Mar 23, 2010·9 cites·22 claims
- 1477US8549055B2Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitrySTREICHER KEONE·Filed 2010·Granted Oct 1, 2013·5 cites·15 claims
- 1576US8581653B1Techniques for providing clock signals in clock networksMARURI VICTOR·Filed 2011·Granted Nov 12, 2013·6 cites·20 claims
- 1676US7138837B2Digital phase locked loop circuitry and methodsALTERA CORP·Filed 2003·Granted Nov 21, 2006·23 cites·28 claims
- 1773US7333570B2Clock data recovery circuitry associated with programmable logic device circuitryALTERA CORP·Filed 2003·Granted Feb 19, 2008·17 cites·17 claims
- 1872US8994425B2Techniques for aligning and reducing skew in serial data signalsVENKATA RAMANAND·Filed 2012·Granted Mar 31, 2015·3 cites·21 claims
- 1965US6985021B1Circuits and techniques for conditioning differential signalsALTERA CORP·Filed 2003·Granted Jan 10, 2006·13 cites·33 claims
- 2058US7292065B2Enhanced passgate structures for reducing leakage currentALTERA CORP·Filed 2004·Granted Nov 6, 2007·8 cites·24 claims
- 2156US8620977B1Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitryALTERA CORP·Filed 2013·Granted Dec 31, 2013·0 cites·18 claims
- 2250US8812755B2Heterogeneous high-speed serial interface system with phase-locked loop architecture and clock distribution systemALTERA CORP·Filed 2014·Granted Aug 19, 2014·0 cites·20 claims
- 2346US9515880B1Integrated circuits with clock selection circuitryVENKATA RAMANAND·Filed 2011·Granted Dec 6, 2016·0 cites·21 claims
- 2446US6970117B1Byte alignment for serial data receiverALTERA CORP·Filed 2004·Granted Nov 29, 2005·3 cites·29 claims
- 2544US2017155529A1Clock Data Recovery Circuitry Associated With Programmable Logic Device CircuitryALTERA CORP·Filed 2016·Application pending·0 cites
- 2643US8739099B1Method and apparatus for determining clock uncertaintiesMARURI VICTOR R·Filed 2008·Granted May 27, 2014·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →