Inventor · disambiguated record
Harsha Gupta
Also filed as: GUPTA HARSHA
7 granted patents·4 pending applications·18 citations·filing 2018–2025
78Inventor score
Top patents by PatentIndex Score
11 records- 0194US10649927B2Dual in-line memory module (DIMM) programmable accelerator cardINTEL CORP·Filed 2018·Granted May 12, 2020·16 cites·15 claims
- 0287US12204441B2Flushing cache lines involving persistent memoryINTEL CORP·Filed 2020·Granted Jan 21, 2025·2 cites·18 claims
- 0378US12237831B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2023·Granted Feb 25, 2025·0 cites·16 claims
- 0474US2025117319A1Flushing Cache Lines Involving Persistent MemoryALTERA CORP·Filed 2024·Application pending·0 cites
- 0574US2025167786A1Network-on-chip (noc) with flexible data widthALTERA CORP·Filed 2025·Application pending·0 cites
- 0672US11700002B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2021·Granted Jul 11, 2023·0 cites·20 claims
- 0769US11342918B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2020·Granted May 24, 2022·0 cites·20 claims
- 0869US2024028544A1Inter-die communication of programmable logic devicesINTEL CORP·Filed 2023·Application pending·0 cites
- 0964US10790827B2Network-on-chip (NOC) with flexible data widthINTEL CORP·Filed 2018·Granted Sep 29, 2020·0 cites·20 claims
- 1056US11789883B2Inter-die communication of programmable logic devicesINTEL CORP·Filed 2018·Granted Oct 17, 2023·0 cites·20 claims
- 1155US2024338397A1Methods and apparatus to determine a number of denoising iterations for model output generationINTEL CORP·Filed 2024·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →