Inventor · disambiguated record
Shannon A. Wichman
Also filed as: WICHMAN SHANNON · WICHMAN SHANNON A
23 granted patents·2 pending applications·867 citations·filing 1993–2008
97Inventor score
Files withTEXAS INSTRUMENTS INC9LSI LOGIC CORP8VERISILICON HOLDINGS CAYMAN IS5VERISILICON HOLDINGS CO LTD1VERISILICON HOLDINGS COMPANY L1
Top patents by PatentIndex Score
25 records- 0194US6421754B1System management mode circuits, systems and methodsTEXAS INSTRUMENTS INC·Filed 1995·Granted Jul 16, 2002·213 cites·28 claims
- 0288US6889318B1Instruction fusion for digital signal processorLSI LOGIC CORP·Filed 2001·Granted May 3, 2005·55 cites·41 claims
- 0387US7418578B2Simultaneously assigning corresponding entry in multiple queues of multi-stage entries for storing condition attributes for validating simultaneously executed conditional execution instruction groupsVERISILICON HOLDINGS CAYMAN IS·Filed 2005·Granted Aug 26, 2008·14 cites·11 claims
- 0486US5552726AHigh resolution digital phase locked loop with automatic recovery logicTEXAS INSTRUMENTS INC·Filed 1993·Granted Sep 3, 1996·60 cites·9 claims
- 0585US7272704B1Hardware looping mechanism and method for efficient execution of discontinuity instructionsVERISILICON HOLDINGS CAYMAN IS·Filed 2004·Granted Sep 18, 2007·44 cites·20 claims
- 0685US7079147B2System and method for cooperative operation of a processor and coprocessorLSI LOGIC CORP·Filed 2003·Granted Jul 18, 2006·36 cites·18 claims
- 0785US5684997AIntegrated circuit design for handling of system management interrupts (SMI)TEXAS INSTRUMENTS INC·Filed 1996·Granted Nov 4, 1997·101 cites·32 claims
- 0884US6112273AMethod and apparatus for handling system management interrupts (SMI) as well as, ordinary interrupts of peripherals such as PCMCIA cardsTEXAS INSTRUMENTS INC·Filed 1996·Granted Aug 29, 2000·92 cites·27 claims
- 0984US5943507AInterrupt routing circuits, systems and methodsTEXAS INSTRUMENTS INC·Filed 1997·Granted Aug 24, 1999·123 cites·27 claims
- 1071US7020765B2Marking queue for simultaneous execution of instructions in code block specified by conditional execution instructionLSI LOGIC CORP·Filed 2002·Granted Mar 28, 2006·12 cites·8 claims
- 1171US6531903B1Divider circuit, method of operation thereof and a phase-locked loop circuit incorporating the sameLSI LOGIC CORP·Filed 2001·Granted Mar 11, 2003·15 cites·15 claims
- 1270US6973630B1System and method for reference-modeling a processorLSI LOGIC CORP·Filed 2003·Granted Dec 6, 2005·15 cites·20 claims
- 1365US7251721B1Conditional link pointer register sets marking the beginning and end of a conditional instruction block where each set corresponds to a single stage of a pipeline that moves link pointers through each corresponding register of said register sets as instructions move through the pipelineVERISILICON HOLDINGS CAYMAN IS·Filed 2001·Granted Jul 31, 2007·11 cites·14 claims
- 1459US6745314B1Circular buffer control circuit and method of operation thereofLSI LOGIC CORP·Filed 2001·Granted Jun 1, 2004·6 cites·20 claims
- 1557US7051146B2Data processing systems including high performance buses and interfaces, and associated communication methodsLSI LOGIC CORP·Filed 2003·Granted May 23, 2006·5 cites·41 claims
- 1656US5884062AMicroprocessor with pipeline status integrity logic for handling multiple stage writeback exceptionsTEXAS INSTRUMENTS INC·Filed 1997·Granted Mar 16, 1999·31 cites·20 claims
- 1755US7231510B1Pipelined multiply-accumulate unit and out-of-order completion logic for a superscalar digital signal processor and method of operation thereofVERISILICON HOLDINGS CAYMAN IS·Filed 2001·Granted Jun 12, 2007·4 cites·17 claims
- 1854US7434036B1System and method for executing software program instructions using a condition specified within a conditional execution instructionVERISILICON HOLDINGS CO LTD·Filed 2002·Granted Oct 7, 2008·4 cites·19 claims
- 1954US2008313433A1Processor for simultaneously executing multiple conditional execution instruction groupsVERISILICON HOLDINGS CAYMAN IS·Filed 2008·Application pending·0 cites
- 2050US6963961B1Increasing DSP efficiency by independent issuance of store address and dataLSI LOGIC CORP·Filed 2001·Granted Nov 8, 2005·1 cites·27 claims
- 2139US2004064684A1System and method for selectively updating pointers used in conditionally executed load/store with update instructionsFiled 2002·Application pending·0 cites
- 2238US5822579AMicroprocessor with dynamically controllable microcontroller condition selectionTEXAS INSTRUMENTS INC·Filed 1997·Granted Oct 13, 1998·10 cites·28 claims
- 2336US5712991ABuffer memory for I/O writes programmable selectiveTEXAS INSTRUMENTS INC·Filed 1995·Granted Jan 27, 1998·9 cites·3 claims
- 2431US7171609B2Processor and method for convolutional decodingVERISILICON HOLDINGS COMPANY L·Filed 2003·Granted Jan 30, 2007·3 cites·16 claims
- 2531US5630108AFrequency independent PCMCIA control signal timingTEXAS INSTRUMENTS INC·Filed 1995·Granted May 13, 1997·3 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →