Inventor · disambiguated record
Hans-Peter Moll
Also filed as: MOLL HANS-PETER
33 granted patents·8 pending applications·71 citations·filing 2001–2017
95Inventor score
Top patents by PatentIndex Score
41 records- 0185US8889022B2Methods of forming asymmetric spacers on various structures on integrated circuit productsGLOBALFOUNDRIES INC·Filed 2013·Granted Nov 18, 2014·7 cites·23 claims
- 0283US9425189B1Compact FDSOI device with Bulex contact extending through buried insulating layer adjacent gate structure for back-biasGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 23, 2016·4 cites·9 claims
- 0381US9735174B2FDSOI—capacitorGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 15, 2017·3 cites·21 claims
- 0478US10048311B2Detection of gate-to-source/drain shortsGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 14, 2018·2 cites·16 claims
- 0577US9502564B2Fully depleted device with buried insulating layer in channel regionGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 22, 2016·2 cites·15 claims
- 0673US9627409B2Semiconductor device with thin-film resistorGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 18, 2017·2 cites·17 claims
- 0771US6932916B2Semiconductor substrate with trenches of varying depthINFINEON TECHNOLOGIES AG·Filed 2003·Granted Aug 23, 2005·13 cites·7 claims
- 0870US9608003B2Integrated circuit product with bulk and SOI semiconductor devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Mar 28, 2017·1 cites·10 claims
- 0970US9391156B2Embedded capacitorGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 12, 2016·2 cites·24 claims
- 1069US10224251B2Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode linesGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 5, 2019·1 cites·20 claims
- 1166US6916721B2Method for fabricating a trench capacitor with an insulation collarINFINEON TECHNOLOGIES AG·Filed 2003·Granted Jul 12, 2005·11 cites·16 claims
- 1264US9673115B2Test structures and method of forming an according test structureGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 6, 2017·1 cites·21 claims
- 1363US9023709B2Top corner rounding by implant-enhanced wet etchingGLOBALFOUNDRIES INC·Filed 2013·Granted May 5, 2015·1 cites·22 claims
- 1460US7754579B2Method of forming a semiconductor deviceQIMONDA AG·Filed 2006·Granted Jul 13, 2010·3 cites·31 claims
- 1554US9960184B2FDSOI-capacitorGLOBALFOUNDRIES INC·Filed 2017·Granted May 1, 2018·0 cites·20 claims
- 1654US9385232B2FD devices in advanced semiconductor techniquesGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 5, 2016·0 cites·27 claims
- 1753US8138538B2Interconnect structure for semiconductor devicesMOLL HANS-PETER·Filed 2008·Granted Mar 20, 2012·1 cites·25 claims
- 1852US6770530B2Method for producing a shallow trench isolation for n- and p-channel field-effect transistors in a semiconductor moduleINFINEON TECHNOLOGIES AG·Filed 2003·Granted Aug 3, 2004·6 cites·10 claims
- 1951US7261829B2Method for masking a recess in a structure having a high aspect ratioINFINEON TECHNOLOGIES AG·Filed 2003·Granted Aug 28, 2007·4 cites·9 claims
- 2050US9443871B2Cointegration of bulk and SOI semiconductor devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 13, 2016·0 cites·15 claims
- 2146US9111756B2Integrated circuits with protected resistors and methods for fabricating the sameGLOBALFOUNDRIES INC·Filed 2013·Granted Aug 18, 2015·0 cites·15 claims
- 2245US2015357433A1INTEGRATED CIRCUITS WITH VERTICAL JUNCTIONS BETWEEN nFETS AND pFETS, AND METHODS OF MANUFACTURING THE SAMEGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
- 2343US7084029B2Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage capacitorINFINEON TECHNOLOGIES AG·Filed 2004·Granted Aug 1, 2006·3 cites·17 claims
- 2442US7605032B2Method for producing a trench transistor and trench transistorQIMONDA AG·Filed 2006·Granted Oct 20, 2009·0 cites·19 claims
- 2541US9553030B2Method of manufacturing P-channel FET device with SiGe channelGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 24, 2017·0 cites·19 claims
- 2641US6586308B2Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structuresINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jul 1, 2003·2 cites·6 claims
- 2741US2009039458A1Integrated deviceQIMONDA AG·Filed 2007·Application pending·0 cites
- 2841US2007054432A1Method for producing a structure with a low aspect ratioQIMONDA AG·Filed 2006·Application pending·0 cites
- 2940US10395981B2Semiconductor device including a leveling dielectric fill materialGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 27, 2019·0 cites·12 claims
- 3040US6924209B2Method for fabricating an integrated semiconductor componentINFINEON TECHNOLOGIES AG·Filed 2001·Granted Aug 2, 2005·1 cites·18 claims
- 3140US2010090348A1Single-Sided Trench Contact WindowPARK INHO·Filed 2008·Application pending·0 cites
- 3239US9553046B2E-fuse in SOI configurationGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 24, 2017·0 cites·18 claims
- 3339US9466685B2Semiconductor structure including at least one electrically conductive pillar, semiconductor structure including a contact contacting an outer layer of an electrically conductive structure and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 11, 2016·0 cites·20 claims
- 3439US6964912B2Method for fabricating a semiconductor structureINFINEON TECHNOLOGIES AG·Filed 2003·Granted Nov 15, 2005·1 cites·7 claims
- 3538US7037777B2Process for producing an etching mask on a microstructure, in particular a semiconductor structure with trench capacitors, and corresponding use of the etching maskINFINEON TECHNOLOGIES AG·Filed 2004·Granted May 2, 2006·0 cites·12 claims
- 3638US2017062438A1Electrical gate-to-source/drain connectionGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 3736US6716720B2Method for filling depressions on a semiconductor waferINFINEON TECHNOLOGIES AG·Filed 2003·Granted Apr 6, 2004·0 cites·9 claims
- 3835US2017162557A1Trench based charge pump deviceGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
- 3934US2016260606A1Methods of forming a masking pattern and a semiconductor device structureGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
- 4033US7125778B2Method for fabricating a self-aligning maskINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 24, 2006·0 cites·14 claims
- 4130US2003003682A1Method for manufacturing an isolation trench filled with a high-density plasma-chemical vapor deposition oxideFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →