Inventor · disambiguated record
David J. Russell
Also filed as: RUSSELL DAVID · RUSSELL DAVID J · RUSSELL DAVID JOHN
85 granted patents·7 pending applications·1,865 citations·filing 1974–2024
99Inventor score
Top patents by PatentIndex Score
92 records- 0197US9401336B2Dual layer stack for contact formationIBM·Filed 2014·Granted Jul 26, 2016·48 cites·17 claims
- 0297US5822856AManufacturing circuit board assemblies having filled viasIBM·Filed 1996·Granted Oct 20, 1998·223 cites·10 claims
- 0396US8522430B2Clustered stacked vias for reliable electronic substratesKACKER KARAN·Filed 2012·Granted Sep 3, 2013·37 cites·8 claims
- 0496US6178093B1Information handling system with circuit assembly having holes filled with filler materialIBM·Filed 1998·Granted Jan 23, 2001·168 cites·33 claims
- 0594US5278010AComposition for photo imagingIBM·Filed 1992·Granted Jan 11, 1994·49 cites·11 claims
- 0694US5026624AComposition for photo imagingIBM·Filed 1989·Granted Jun 25, 1991·133 cites·26 claims
- 0793US5300402AComposition for photo imagingIBM·Filed 1991·Granted Apr 5, 1994·100 cites·14 claims
- 0892US5439766AComposition for photo imagingIBM·Filed 1992·Granted Aug 8, 1995·96 cites·22 claims
- 0991US6542379B1Circuitry with integrated passive components and method for producingIBM·Filed 1999·Granted Apr 1, 2003·81 cites·24 claims
- 1088US5304457AComposition for photo imagingIBM·Filed 1992·Granted Apr 19, 1994·20 cites·14 claims
- 1185US6121069AInterconnect structure for joining a chip to a circuit cardIBM·Filed 1999·Granted Sep 19, 2000·66 cites·12 claims
- 1285US5876842AModular circuit package having vertically aligned power and signal coresIBM·Filed 1996·Granted Mar 2, 1999·85 cites·29 claims
- 1383US9105535B2Copper feature design for warpage control of substratesBLACKSHEAR EDMUND·Filed 2012·Granted Aug 11, 2015·6 cites·8 claims
- 1482US9543255B2Reduced-warpage laminate structureIBM·Filed 2016·Granted Jan 10, 2017·3 cites·1 claims
- 1582US6576382B2Composition for photoimagingIBM·Filed 2002·Granted Jun 10, 2003·18 cites·12 claims
- 1682US6000129AProcess for manufacturing a circuit with filled holesIBM·Filed 1998·Granted Dec 14, 1999·43 cites·4 claims
- 1781US9659131B2Copper feature design for warpage control of substratesGLOBALFOUNDRIES INC·Filed 2015·Granted May 23, 2017·3 cites·11 claims
- 1881US8232655B2Bump pad metallurgy employing an electrolytic Cu / electorlytic Ni / electrolytic Cu stackARVIN CHARLES L·Filed 2008·Granted Jul 31, 2012·9 cites·20 claims
- 1980US10276534B2Reduction of solder interconnect stressIBM·Filed 2017·Granted Apr 30, 2019·2 cites·14 claims
- 2080US6706464B2Method of fabricating circuitized structuresIBM·Filed 2003·Granted Mar 16, 2004·15 cites·8 claims
- 2180US6522014B1Fabrication of a metalized blind viaIBM·Filed 2000·Granted Feb 18, 2003·23 cites·20 claims
- 2280US5264325AComposition for photo imagingIBM·Filed 1992·Granted Nov 23, 1993·36 cites·43 claims
- 2379US6138350AProcess for manufacturing a circuit board with filled holesIBM·Filed 1998·Granted Oct 31, 2000·37 cites·12 claims
- 2477US6521844B1Through hole in a photoimageable dielectric structure with wired and uncured dielectricIBM·Filed 1999·Granted Feb 18, 2003·33 cites·11 claims
- 2577US6210862B1Composition for photoimagingIBM·Filed 1998·Granted Apr 3, 2001·35 cites·18 claims
- 2676US8415792B2Electrical contact alignment postsWEST DAVID JUSTIN·Filed 2010·Granted Apr 9, 2013·5 cites·9 claims
- 2776US6528218B1Method of fabricating circuitized structuresIBM·Filed 2001·Granted Mar 4, 2003·12 cites·8 claims
- 2876US6391210B2Process for manufacturing a multi-layer circuit boardIBM·Filed 2001·Granted May 21, 2002·17 cites·21 claims
- 2976US5953623ABall limiting metal mask and tin enrichment of high melting point solder for low temperature interconnectionIBM·Filed 1997·Granted Sep 14, 1999·43 cites·20 claims
- 3074US5665650AMethod for manufacturing a high density electronic circuit assemblyIBM·Filed 1996·Granted Sep 9, 1997·41 cites·15 claims
- 3173US9913405B2Glass interposer with embedded thermoelectric devicesIBM·Filed 2015·Granted Mar 6, 2018·2 cites·8 claims
- 3273US9613915B2Reduced-warpage laminate structureIBM·Filed 2014·Granted Apr 4, 2017·2 cites·16 claims
- 3371US8841209B2Method for forming coreless flip chip ball grid array (FCBGA) substrates and such substrates formed by the methodALLARD SYLVIE·Filed 2011·Granted Sep 23, 2014·4 cites·14 claims
- 3471US6423905B1Printed wiring board with improved plated through hole fatigue lifeIBM·Filed 2000·Granted Jul 23, 2002·15 cites·6 claims
- 3570US6689543B2Laser ablatable material and its useIBM·Filed 2002·Granted Feb 10, 2004·12 cites·4 claims
- 3669US9865557B1Reduction of solder interconnect stressIBM·Filed 2016·Granted Jan 9, 2018·1 cites·9 claims
- 3769US8242593B2Clustered stacked vias for reliable electronic substratesKACKER KARAN·Filed 2008·Granted Aug 14, 2012·4 cites·8 claims
- 3869US6127025ACircuit board with wiring sealing filled holesIBM·Filed 1998·Granted Oct 3, 2000·23 cites·24 claims
- 3969US5439779AAqueous soldermaskIBM·Filed 1994·Granted Aug 8, 1995·22 cites·4 claims
- 4068US7982475B2Structure and method for reliability evaluation of FCPBGA substrates for high power semiconductor packaging applicationsIBM·Filed 2006·Granted Jul 19, 2011·4 cites·11 claims
- 4167US9478453B2Sacrificial carrier dicing of semiconductor wafersIBM·Filed 2014·Granted Oct 25, 2016·1 cites·16 claims
- 4267US6195264B1Laminate substrate having joining layer of photoimageable materialIBM·Filed 1998·Granted Feb 27, 2001·30 cites·19 claims
- 4367US5993945AProcess for high resolution photoimageable dielectricIBM·Filed 1997·Granted Nov 30, 1999·35 cites·9 claims
- 4466US6519843B2Method of forming a chip carrier by joining a laminate layer and stiffenerIBM·Filed 2001·Granted Feb 18, 2003·12 cites·7 claims
- 4565US9563732B1In-plane copper imbalance for warpage predictionIBM·Filed 2016·Granted Feb 7, 2017·1 cites·16 claims
- 4663US10342122B2Interface for limiting substrate damage due to discrete failureIBM·Filed 2018·Granted Jul 2, 2019·0 cites·14 claims
- 4763US9142501B2Under ball metallurgy (UBM) for improved electromigrationIBM·Filed 2014·Granted Sep 22, 2015·1 cites·23 claims
- 4863US8530345B2Electrical contact alignment postsIBM·Filed 2013·Granted Sep 10, 2013·1 cites·6 claims
- 4962US7868459B2Semiconductor package having non-aligned active viasIBM·Filed 2006·Granted Jan 11, 2011·2 cites·7 claims
- 5061US7312523B2Enhanced via structure for organic module performanceIBM·Filed 2005·Granted Dec 25, 2007·2 cites·20 claims
Showing the top 50 of 92 patent records by PatentIndex Score.
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