Inventor · disambiguated record
Jessica Dechene
Also filed as: DECHENE JESSICA · DECHENE JESSICA M · DECHENE JESSICA MARY
22 granted patents·3 pending applications·80 citations·filing 2016–2024
94Inventor score
Files withIBM10GLOBALFOUNDRIES INC7ADEIA SEMICONDUCTOR SOLUTIONS LLC3TESSERA INC3GLOBALFOUNDRIES US INC2
Top patents by PatentIndex Score
25 records- 0198US9450095B1Single spacer for complementary metal oxide semiconductor process flowIBM·Filed 2016·Granted Sep 20, 2016·24 cites·16 claims
- 0295US10325819B1Methods, apparatus and system for providing a pre-RMG replacement metal contact for a finFET deviceGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 18, 2019·15 cites·20 claims
- 0393US11810812B2Single diffusion cut for gate structuresGLOBALFOUNDRIES US INC·Filed 2021·Granted Nov 7, 2023·2 cites·20 claims
- 0493US10269654B1Methods, apparatus and system for replacement contact for a finFET deviceGLOBALFOUNDRIES INC·Filed 2018·Granted Apr 23, 2019·12 cites·20 claims
- 0591US11837501B2Selective recessing to form a fully aligned viaADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2022·Granted Dec 5, 2023·1 cites·26 claims
- 0690US2025140611A1Selective recessing to form a fully aligned viaADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2024·Application pending·0 cites
- 0789US11127623B2Single diffusion cut for gate structuresGLOBALFOUNDRIES US INC·Filed 2018·Granted Sep 21, 2021·4 cites·20 claims
- 0887US9859212B1Multi-level air gap formation in dual-damascene structureIBM·Filed 2016·Granted Jan 2, 2018·4 cites·20 claims
- 0985US10224239B2Multi-level air gap formation in dual-damascene structureIBM·Filed 2017·Granted Mar 5, 2019·3 cites·20 claims
- 1085US10049974B2Metal silicate spacers for fully aligned viasIBM·Filed 2016·Granted Aug 14, 2018·4 cites·13 claims
- 1182US12183634B2Selective recessing to form a fully aligned viaADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2023·Granted Dec 31, 2024·0 cites·22 claims
- 1282US10276436B2Selective recessing to form a fully aligned viaIBM·Filed 2016·Granted Apr 30, 2019·2 cites·9 claims
- 1381US9754942B2Single spacer for complementary metal oxide semiconductor process flowIBM·Filed 2016·Granted Sep 5, 2017·2 cites·18 claims
- 1480US10833160B1Field-effect transistors with self-aligned and non-self-aligned contact openingsGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 10, 2020·3 cites·9 claims
- 1577US10204797B1Methods, apparatus, and system for reducing step height difference in semiconductor devicesGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 12, 2019·2 cites·20 claims
- 1676US10586733B2Multi-level air gap formation in dual-damascene structureIBM·Filed 2019·Granted Mar 10, 2020·1 cites·20 claims
- 1775US11257717B2Selective recessing to form a fully aligned viaTESSERA INC·Filed 2020·Granted Feb 22, 2022·0 cites·27 claims
- 1872US9748146B1Single spacer for complementary metal oxide semiconductor process flowIBM·Filed 2016·Granted Aug 29, 2017·1 cites·20 claims
- 1964US10636706B2Selective recessing to form a fully aligned viaTESSERA INC·Filed 2018·Granted Apr 28, 2020·0 cites·20 claims
- 2063US10832952B2Selective recessing to form a fully aligned viaTESSERA INC·Filed 2018·Granted Nov 10, 2020·0 cites·20 claims
- 2157US10204827B2Multi-level air gap formation in dual-damascene structureIBM·Filed 2017·Granted Feb 12, 2019·0 cites·20 claims
- 2256US10211138B2Metal silicate spacers for fully aligned viasIBM·Filed 2018·Granted Feb 19, 2019·0 cites·20 claims
- 2342US2020227323A1Isolation structures of finfet semiconductor devicesGLOBALFOUNDRIES INC·Filed 2019·Application pending·0 cites
- 2441US2020211903A1Semiconductor structure with shaped trench and methods of forming the sameGLOBALFOUNDRIES INC·Filed 2019·Application pending·0 cites
- 2538US10453751B2Tone inversion method and structure for selective contact via patterningGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 22, 2019·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →