Inventor · disambiguated record
Rohit S. Shenoy
Also filed as: SHENOY ROHIT · SHENOY ROHIT S · SHENOY ROHIT SUDHIR
24 granted patents·7 pending applications·236 citations·filing 2005–2025
95Inventor score
Top patents by PatentIndex Score
31 records- 0196US10109361B1Coarse pass and fine pass multi-level NVM programmingINTEL CORP·Filed 2017·Granted Oct 23, 2018·30 cites·25 claims
- 0294US10242734B1Resuming storage die programming after power lossINTEL CORP·Filed 2017·Granted Mar 26, 2019·19 cites·22 claims
- 0391US7996255B1System and method for providing sales leads based on-demand software trial usageMATHWORKS INC·Filed 2005·Granted Aug 9, 2011·73 cites·23 claims
- 0489US8688491B1Testing and error reporting for on-demand software based marketing and salesSHENOY ROHIT·Filed 2011·Granted Apr 1, 2014·35 cites·18 claims
- 0587US8682822B2Electronic learning synapse with spike-timing dependent plasticity using memory-switching elementsMODHA DHARMENDRA S·Filed 2012·Granted Mar 25, 2014·19 cites·18 claims
- 0685US11625191B2Apparatuses, systems, and methods for heating a memory deviceINTEL CORP·Filed 2020·Granted Apr 11, 2023·2 cites·22 claims
- 0783US8830725B2Low temperature BEOL compatible diode having high voltage margins for use in large arrays of electronic componentsBETHUNE DONALD S·Filed 2011·Granted Sep 9, 2014·10 cites·30 claims
- 0883US8250010B2Electronic learning synapse with spike-timing dependent plasticity using unipolar memory-switching elementsMODHA DHARMENDRA SHANTILAL·Filed 2009·Granted Aug 21, 2012·25 cites·23 claims
- 0981US7928419B2Electrolytic device based on a solution-processed electrolyteIBM·Filed 2007·Granted Apr 19, 2011·3 cites·17 claims
- 1080US12099420B2Persistent data structure to track and manage SSD defectsINTEL CORP·Filed 2020·Granted Sep 24, 2024·1 cites·20 claims
- 1180US2025322881A1Temperature-based modulation of program step voltages for flash memory devicesIntel NDTM US LLC·Filed 2025·Application pending·0 cites
- 1278US2025349342A1Staggered read recovery for improved read window budget in a three dimensional (3d) nand memory arrayIntel NDTM US LLC·Filed 2025·Application pending·0 cites
- 1375US12340847B2Flash memory chip that modulates its program step voltage as a function of chip temperatureIntel NDTM US LLC·Filed 2024·Granted Jun 24, 2025·0 cites·20 claims
- 1474US9812638B2Backend of line (BEOL) compatible high current density access device for high density arrays of electronic componentsBETHUNE DONALD S·Filed 2010·Granted Nov 7, 2017·3 cites·21 claims
- 1574US7393739B2Demultiplexers using transistors for accessing memory cell arraysIBM·Filed 2006·Granted Jul 1, 2008·5 cites·1 claims
- 1673US8114723B2Method of forming multi-high-density memory devices and architecturesGOPALAKRISHNAN KAILASH·Filed 2010·Granted Feb 14, 2012·6 cites·20 claims
- 1772US8811060B2Non-volatile memory crosspoint repairBURR GEOFFREY W·Filed 2012·Granted Aug 19, 2014·5 cites·23 claims
- 1872US2024354209A1Persistent data structure to track and manage ssd defectsINTEL CORP·Filed 2024·Application pending·0 cites
- 1962US2008314738A1Electrolytic Device Based on a Solution-Processed ElectrolyteIBM·Filed 2007·Application pending·0 cites
- 2059US11923010B2Flash memory chip that modulates its program step voltage as a function of chip temperatureIntel NDTM US LLC·Filed 2020·Granted Mar 5, 2024·0 cites·20 claims
- 2158US12001280B2Overcoming error correction coding mis-corrects in non-volatile memoryINTEL CORP·Filed 2020·Granted Jun 4, 2024·0 cites·21 claims
- 2257US12362002B2Staggered read recovery for improved read window budget in a three dimensional (3D) NAND memory arrayIntel NDTM US LLC·Filed 2021·Granted Jul 15, 2025·0 cites·16 claims
- 2356US12243590B2Method and apparatus for improving write uniformity in a memory deviceINTEL CORP·Filed 2021·Granted Mar 4, 2025·0 cites·20 claims
- 2450US11315644B2String current reduction during multistrobe sensing to reduce read disturbINTEL CORP·Filed 2020·Granted Apr 26, 2022·0 cites·20 claims
- 2550US7829926B2Demultiplexers using transistors for accessing memory cell arraysIBM·Filed 2008·Granted Nov 9, 2010·0 cites·36 claims
- 2646US12106815B2Variable error correction codeword packing to support bit error rate targetsINTEL CORP·Filed 2020·Granted Oct 1, 2024·0 cites·20 claims
- 2744US11302405B2System approach to reduce stable threshold voltage (Vt) read disturb degradationINTEL CORP·Filed 2019·Granted Apr 12, 2022·0 cites·20 claims
- 2844US2024071532A1Fast and efficient verify recovery and array discharge for 3d nand memory arraysIntel NDTM US LLC·Filed 2023·Application pending·0 cites
- 2941US2023044991A1Page map renumbering to reduce error correction failures and improve program time uniformityINTEL CORP·Filed 2021·Application pending·0 cites
- 3040US2019043567A1Temperature-dependent read operation time adjustment in non-volatile memory devicesINTEL CORP·Filed 2018·Application pending·0 cites
- 3137US7763932B2Multi-bit high-density memory device and architecture and method of fabricating multi-bit high-density memory devicesIBM·Filed 2006·Granted Jul 27, 2010·0 cites·26 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →