Inventor · disambiguated record
Deleep R. Nair
Also filed as: NAIR DELEEP R
12 granted patents·45 citations·filing 2006–2015
89Inventor score
Top patents by PatentIndex Score
12 records- 0187US8298897B2Asymmetric channel MOSFETCHEN XIANGDONG·Filed 2012·Granted Oct 30, 2012·8 cites·9 claims
- 0284US8237197B2Asymmetric channel MOSFETCHEN XIANGDONG·Filed 2010·Granted Aug 7, 2012·7 cites·20 claims
- 0382US9196707B2Oxygen scavenging spacer for a gate electrodeIBM·Filed 2013·Granted Nov 24, 2015·4 cites·19 claims
- 0480US9059211B2Oxygen scavenging spacer for a gate electrodeCHUDZIK MICHAEL P·Filed 2011·Granted Jun 16, 2015·4 cites·18 claims
- 0580US8993402B2Method of manufacturing a body-contacted SOI FINFETKANIKE NARASIMHULU·Filed 2012·Granted Mar 31, 2015·6 cites·5 claims
- 0673US9093495B2Method and structure to reduce FET threshold voltage shift due to oxygen diffusionBAIOCCO CHRISTOPHER VINCENT·Filed 2012·Granted Jul 28, 2015·4 cites·18 claims
- 0772US7863112B2Method and structure to protect FETs from plasma damage during FEOL processingIBM·Filed 2008·Granted Jan 4, 2011·5 cites·3 claims
- 0869US7521308B2Dual layer stress liner for MOSFETSIBM·Filed 2006·Granted Apr 21, 2009·3 cites·3 claims
- 0964US8563394B2Integrated circuit structure having substantially planar N-P step height and methods of formingLI WEIPENG·Filed 2011·Granted Oct 22, 2013·2 cites·15 claims
- 1051US8623714B2Spacer protection and electrical connection for array devicePARK JAE-EUN·Filed 2010·Granted Jan 7, 2014·1 cites·15 claims
- 1150US8853796B2High-K metal gate deviceTEH YOUNG WAY·Filed 2011·Granted Oct 7, 2014·1 cites·26 claims
- 1248US9431289B2Method and structure to reduce FET threshold voltage shift due to oxygen diffusionGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 30, 2016·0 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →