Inventor · disambiguated record
Dz-Ching Ju
Also filed as: JU DZ-CHING · JU DZ-CHING ROY
36 granted patents·12 pending applications·1,121 citations·filing 1995–2025
98Inventor score
Top patents by PatentIndex Score
48 records- 0194US7689867B2Multiprocessor breakpointINTEL CORP·Filed 2005·Granted Mar 30, 2010·43 cites·23 claims
- 0293US8683468B2Automatic kernel migration for heterogeneous coresBRETERNITZ MAURICIO·Filed 2011·Granted Mar 25, 2014·25 cites·18 claims
- 0391US6260190B1Unified compiler framework for control and data speculation with recovery codeHEWLETT PACKARD CO·Filed 1998·Granted Jul 10, 2001·183 cites·27 claims
- 0488US6832370B1Data speculation within modulo scheduled loopsHEWLETT PACKARD DEVELOPMENT LP·Filed 2000·Granted Dec 14, 2004·75 cites·26 claims
- 0586US6839895B1Method of, system for, and computer program product for providing efficient utilization of memory hierarchy through code restructuringIBM·Filed 2000·Granted Jan 4, 2005·47 cites·18 claims
- 0684US7350024B2Automatic generation of software-controlled caching and ordered synchronizationINTEL CORP·Filed 2004·Granted Mar 25, 2008·39 cites·5 claims
- 0784US5937195AGlobal control flow treatment of predicated codeHEWLETT PACKARD CO·Filed 1996·Granted Aug 10, 1999·115 cites·40 claims
- 0883US6175957B1Method of, system for, and computer program product for providing efficient utilization of memory hierarchy through code restructuringIBM·Filed 1997·Granted Jan 16, 2001·105 cites·15 claims
- 0982US8352686B2Method and system for data prefetching for loops based on linear induction expressionsADVANCED MICRO DEVICES INC·Filed 2010·Granted Jan 8, 2013·7 cites·20 claims
- 1081US7694290B2System and method for partitioning an application utilizing a throughput-driven aggregation and mapping approachINTEL CORP·Filed 2005·Granted Apr 6, 2010·14 cites·19 claims
- 1180US6662273B1Least critical used replacement with critical cacheINTEL CORP·Filed 2000·Granted Dec 9, 2003·28 cites·38 claims
- 1278US6959435B2Compiler-directed speculative approach to resolve performance-degrading long latency events in an applicationINTEL CORP·Filed 2001·Granted Oct 25, 2005·25 cites·3 claims
- 1376US2025190220A1Techniques for parallel executionNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1475US6779108B2Incorporating trigger loads in branch histories for branch predictionINTEL CORP·Filed 2000·Granted Aug 17, 2004·20 cites·37 claims
- 1573US7529888B2Software caching with bounded-error delayed updateINTEL CORP·Filed 2004·Granted May 5, 2009·18 cites·23 claims
- 1673US6182284B1Method and system for eliminating phi instruction resource interferences and redundant copy instructions from static-single-assignment-form computer codeHEWLETT PACKARD CO·Filed 1998·Granted Jan 30, 2001·66 cites·25 claims
- 1772US7058937B2Methods and systems for integrated scheduling and resource management for a compilerINTEL CORP·Filed 2002·Granted Jun 6, 2006·20 cites·29 claims
- 1872US6760816B1Critical loads guided data prefetchingINTEL CORP·Filed 2000·Granted Jul 6, 2004·17 cites·35 claims
- 1969US12056494B2Techniques for parallel executionNVIDIA CORP·Filed 2021·Granted Aug 6, 2024·0 cites·35 claims
- 2068US2025181889A1Api for recurrent neural networksNVIDIA CORP·Filed 2025·Application pending·0 cites
- 2166US9015690B2Proactive loop fusion of non-adjacent loops with intervening control flow instructionsYE MEI·Filed 2009·Granted Apr 21, 2015·7 cites·16 claims
- 2266US7512738B2Allocating call stack frame entries at different memory levels to functions in a programINTEL CORP·Filed 2004·Granted Mar 31, 2009·14 cites·33 claims
- 2366US6249910B1Apparatus and method for incrementally update static single assignment form for cloned variable name definitionsHEWLETT PACKARD CO·Filed 1998·Granted Jun 19, 2001·58 cites·24 claims
- 2465US5943499ASystem and method for solving general global data flow predicated code problemsHEWLETT PACKARD CO·Filed 1996·Granted Aug 24, 1999·45 cites·29 claims
- 2564US6898787B2Method and apparatus for ordered predicate phi in static single assignment formHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted May 24, 2005·10 cites·15 claims
- 2662US7480768B2Apparatus, systems and methods to reduce access to shared data storageINTEL CORP·Filed 2005·Granted Jan 20, 2009·2 cites·20 claims
- 2762US7257806B1System and method for efficiently passing information between compiler and post-compile-time softwareHEWLETT PACKARD DEVELOPMENT CO·Filed 1999·Granted Aug 14, 2007·36 cites·5 claims
- 2862US7120775B2Inter-procedural allocation of stacked registers for a processorINTEL CORP·Filed 2003·Granted Oct 10, 2006·11 cites·30 claims
- 2961US7469404B2Bank assignment for partitioned register banksINTEL CORP·Filed 2004·Granted Dec 23, 2008·10 cites·15 claims
- 3060US8656409B2High performance queue implementations in multiprocessor systemsLI XIAO-FENG·Filed 2005·Granted Feb 18, 2014·3 cites·18 claims
- 3159US6782469B1Runtime critical load/data orderingINTEL CORP·Filed 2000·Granted Aug 24, 2004·6 cites·33 claims
- 3258US6041181AMethod of, system for, and computer program product for providing quick fusion in WHERE constructsIBM·Filed 1997·Granted Mar 21, 2000·35 cites·24 claims
- 3358US2024070450A1Tensor processing for neural networkNVIDIA CORP·Filed 2022·Application pending·0 cites
- 3458US2021192314A1Api for recurrent neural networksNVIDIA CORP·Filed 2019·Application pending·0 cites
- 3557US7313790B2Methods and apparatus for preserving precise exceptions in code reordering by using control speculationINTEL CORP·Filed 2003·Granted Dec 25, 2007·4 cites·10 claims
- 3654US5845126AMethod of, system for, and computer program product for providing inlined nested array constructors using normalized countersIBM·Filed 1995·Granted Dec 1, 1998·28 cites·12 claims
- 3753US8769509B2Methods and apparatus for preserving precise exceptions in code reordering by using control speculationJU DZ-CHING·Filed 2007·Granted Jul 1, 2014·1 cites·15 claims
- 3853US7082602B2Function unit based finite state automata data structure, transitions and methods for making the sameINTEL CORP·Filed 2002·Granted Jul 25, 2006·4 cites·22 claims
- 3948US2007226720A1System and Method for Efficiently Passing Information Between Compiler and Post-Compile-Time SoftwareCHEN DING-KAI·Filed 2007·Application pending·0 cites
- 4048US2023229588A1Operations on matrix operands irrespective of where operands are stored in memoryNVIDIA CORP·Filed 2022·Application pending·0 cites
- 4146US2022342666A1Acceleration of operationsNVIDIA CORP·Filed 2021·Application pending·0 cites
- 4245US10019373B2Memory management method for supporting shared virtual memories with hybrid page table utilization and related machine readable mediumMEDIATEK INC·Filed 2015·Granted Jul 10, 2018·0 cites·18 claims
- 4343US2022350683A1Techniques for combining operationsNVIDIA CORP·Filed 2021·Application pending·0 cites
- 4439US2013125100A1Computer system and method for compiling program code and assigning address spacesZHENG BIXIA·Filed 2011·Application pending·0 cites
- 4538US2007226740A1Method and apparatus for global breakpoint for parallel debugging on multiprocessor systemsLI XIAO-FENG·Filed 2006·Application pending·0 cites
- 4636US2007130114A1Methods and apparatus to optimize processing throughput of data structures in programsLI XIAO-FENG·Filed 2006·Application pending·0 cites
- 4735US9921838B2System and method for managing static divergence in a SIMD computing architectureMEDIATEK INC·Filed 2015·Granted Mar 20, 2018·0 cites·17 claims
- 4835US2013159685A1Control flow-based approach in implementing exception handling on a graphics processing unitJU DZ-CHING·Filed 2011·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Dz-Ching Ju files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →