System and Method for Efficiently Passing Information Between Compiler and Post-Compile-Time Software
Abstract
System and method are described for register optimization during code translation utilizes a technique that removes the time overhead for analyzing register usage and eliminates fixed restraints on the compiler register usage. The present invention for register optimization utilizes a compiler to produce a register usage bit vector in a NOP instruction within each basic block (i.e., subroutine, function, and/or procedure). Each bit in the bit vector represents a particular caller-saved register. A bit is set if, at the location of NOP instruction, the compiler uses the corresponding register within that basic block containing the NOP instruction to hold information to be used at a later time. During the translation, the translator examines the register usage bit vector to very quickly determine which registers are free and therefore can be used during the register optimization without the need to save and restore the register values.
Claims
exact text as granted — not AI-modified1 . A method for passing information to a post-compile-time software application, comprising the steps of:
compiling a plurality of blocks of code, including finding one or more unused bits in an instruction in one of the plurality of blocks of code, and using the one or more unused bits to encode information without defining new instructions; and communicating the information to the post-compile-time software application for use by the post-compile-time software application.
2 . The method of claim 1 , wherein the information identifies whether certain registers are live.
3 . The method of claim 1 , wherein the post-compile-time software application comprises a dynamic optimizer.
4 . The method of claim 1 , wherein the instruction is a no-operation (NOP) instruction.
5 . The method of claim 1 , wherein the information is used by the post-compile-time software application to determine whether certain registers are live.
6 . The method of claim 1 , wherein the information is encoded as a bit vector.
7 . The method of claim 1 , wherein the step of using the one or more unused bits to encode information, comprises:
determining which of a plurality of registers are live in said one of the plurality of blocks of code; creating within the instruction a register-usage bit-vector having a plurality of register-usage bits; and setting one of the plurality of register-usage bits for each one of the plurality of registers that are live.
8 . A system comprising:
a compiler that is configured to compile a plurality of blocks of code, the compiler including a code annotator that is configured to find one or more unused bits in an instruction in one of the plurality of blocks of code that are being compiled by the compiler, and to encode information in the one or more unused bits without defining new instructions, the information being configured to be used by a post-compile-time software application; and a processor configured to execute the compiler.
9 . The system of claim 8 , wherein the information identifies whether certain registers in said one of the plurality of blocks of code are live.
10 . The system of claim 8 , wherein the post-compile-time software application comprises a dynamic optimizer.
11 . The system of claim 8 , wherein the instruction is a no-operation (NOP) instruction.
12 . The system of claim 8 , wherein the post-compile-time software application is configured to use the information to determine whether certain registers are live.
13 . The system of claim 8 , wherein the information is encoded as a bit vector.
14 . A system comprising:
means for compiling a plurality of blocks of code, including finding one or more unused bits in an instruction in one of the plurality of blocks of code, and using the one or more unused bits to pass information to a post-compile-time software application without defining new instructions; and means for executing the means for compiling and the post-compile time software application.
15 . The system of claim 14 , wherein the information identifies whether certain registers are live.
16 . The system of claim 14 , wherein the post-compile-time software application comprises a dynamic optimizer.
17 . The system of claim 14 , wherein the instruction is a no-operation (NOP) instruction.
18 . A method for compiling, comprising the steps of:
finding one or more unused bits in an instruction in one of a plurality of blocks of code that are being compiled; and encoding information in the one or more unused bits without defining new instructions, wherein the information is used by a post-compile-time software application.
19 . The method of claim 18 , wherein the information identifies whether certain registers are live.
20 . The method of claim 18 , wherein the post-compile-time software application comprises a dynamic optimizer.
21 . The method of claim 18 , wherein the instruction is a no-operation (NOP) instruction.
22 . The method of claim 18 , further comprising: using the information by the post-compile-time software application to determine whether certain registers are live.
23 . The method of claim 18 , wherein the information is encoded as a bit vector.
24 . A method for passing information to a post-compile-time software application, comprising the steps of:
compiling a plurality of blocks of code; and during the step of compiling, finding one or more unused bits in an instruction in one of the plurality of blocks of code, wherein the one or more unused bits are used to pass information to the post-compile-time software application without defining new instructions.
25 . The method of claim 24 , wherein the information identifies whether certain registers are live.
26 . The method of claim 24 , wherein the instruction is a no-operation (NOP) instruction.
27 . A computer system comprising:
memory configured to store software; a processor that is coupled to the memory and that is configured to execute software stored in the memory; a compiler that is stored in the memory and that is configured to compile blocks of code, to find unused bits in an instruction in one of the blocks of code, and to encode information as a bit vector in the unused bits; and a post-compile-time software application that is stored in the memory and that is configured to use the information to modify the compiled blocks of code.
28 . The system of claim 27 , wherein the instruction is a no-operation (NOP) instruction.
29 . The system of claim 27 , wherein the post-compile-time software application is configured to use the information to determine whether certain registers are live.
30 . The system of claim 27 , wherein the information identifies whether certain registers in said one of the blocks of code are live.
31 . The system of claim 27 , wherein the post-compile-time software application comprises a dynamic optimizer.
32 . A method that is implemented by software, comprising the steps of:
storing a post-compile-time software application in memory that is coupled to a processor; compiling blocks of code, including finding unused bits in an instruction in one of the blocks of code, and encoding information as a bit vector in the unused bits; and modifying the compiled blocks of code by the post-compile-time software application, wherein a configuration of the modified and compiled blocks of code is responsive to the information.
33 . The method of claim 32 , wherein the instruction is a no-operation (NOP) instruction.
34 . The method of claim 32 , wherein the post-compile-time software application is configured to use the information to determine whether certain registers are live.
35 . The method of claim 32 , wherein the information identifies whether certain registers in said one of the blocks of code are live.
36 . The method of claim 32 , wherein the post-compile-time software application comprises a dynamic optimizer.Join the waitlist — get patent alerts
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