Inventor · disambiguated record
Trent S. Uehling
Also filed as: UEHLING TRENT · UEHLING TRENT S
28 granted patents·6 pending applications·252 citations·filing 2000–2023
96Inventor score
Top patents by PatentIndex Score
34 records- 0194US9935079B1Laser sintered interconnections between dieNXP USA INC·Filed 2016·Granted Apr 3, 2018·16 cites·13 claims
- 0292US9548256B2Heat spreader and method for formingFREESCALE SEMICONDUCTOR INC·Filed 2015·Granted Jan 17, 2017·5 cites·15 claims
- 0392US8349666B1Fused buss for plating features on a semiconductor dieFREESCALE SEMICONDUCTOR INC·Filed 2011·Granted Jan 8, 2013·15 cites·11 claims
- 0492US7129566B2Scribe street structure for backend interconnect semiconductor wafer integrationFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Oct 31, 2006·72 cites·10 claims
- 0591US7276435B1Die level metal density gradient for improved flip chip package reliabilityFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Oct 2, 2007·27 cites·20 claims
- 0689US6951801B2Metal reduction in wafer scribe areaFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Oct 4, 2005·51 cites·24 claims
- 0788US9703056B2Copper tube interconnectFREESCALE SEMICONDUCTOR INC·Filed 2014·Granted Jul 11, 2017·17 cites·11 claims
- 0887US8008786B2Dynamic pad size to reduce solder fatigueFREESCALE SEMICONDUCTOR INC·Filed 2010·Granted Aug 30, 2011·7 cites·20 claims
- 0986US9466544B2Semiconducitive catechol group encapsulant adhesion promoter for a packaged electronic deviceUEHLING TRENT S·Filed 2013·Granted Oct 11, 2016·7 cites·11 claims
- 1086US7772104B2Dynamic pad size to reduce solder fatigueFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Aug 10, 2010·13 cites·18 claims
- 1177US8314026B2Anchored conductive via and method for formingUEHLING TRENT S·Filed 2011·Granted Nov 20, 2012·5 cites·20 claims
- 1276US12341089B2Device package substrate structure and method thereforNXP USA INC·Filed 2023·Granted Jun 24, 2025·0 cites·18 claims
- 1372US8766453B2Packaged integrated circuit having large solder pads and method for formingUEHLING TRENT S·Filed 2012·Granted Jul 1, 2014·3 cites·20 claims
- 1470US8368172B1Fused buss for plating features on a semiconductor dieFREESCALE SEMICONDUCTOR INC·Filed 2011·Granted Feb 5, 2013·2 cites·20 claims
- 1567US8704370B2Semiconductor package structure having an air gap and method for formingUEHLING TRENT S·Filed 2012·Granted Apr 22, 2014·2 cites·20 claims
- 1665US9373539B2Collapsible probe tower device and method of forming thereofFREESCALE SEMICONDUCTOR INC·Filed 2014·Granted Jun 21, 2016·3 cites·21 claims
- 1764US11798871B2Device package substrate structure and method thereforNXP USA INC·Filed 2020·Granted Oct 24, 2023·0 cites·19 claims
- 1863US10037970B2Multiple interconnections between dieFREESCALE SEMICONDUCTOR INC·Filed 2016·Granted Jul 31, 2018·1 cites·20 claims
- 1963US8895409B2Semiconductor wafer plating bus and method for formingUEHLING TRENT S·Filed 2013·Granted Nov 25, 2014·1 cites·8 claims
- 2062US9324667B2Semiconductor devices with compliant interconnectsUEHLING TRENT S·Filed 2012·Granted Apr 26, 2016·2 cites·11 claims
- 2162US9093515B2Wire bonding capillary with working tip protrusionUEHLING TRENT·Filed 2013·Granted Jul 28, 2015·3 cites·24 claims
- 2257US2025038092A1Semiconductor device with hybrid routing and method thereforNXP USA INC·Filed 2023·Application pending·0 cites
- 2353US2024282726A1Semiconductor device with pad contact feature and method thereforNXP USA INC·Filed 2023·Application pending·0 cites
- 2451US9496212B2Substrate core via structureFREESCALE SEMICONDUCTOR INC·Filed 2014·Granted Nov 15, 2016·0 cites·19 claims
- 2550US8519513B2Semiconductor wafer plating busUEHLING TRENT S·Filed 2012·Granted Aug 27, 2013·0 cites·12 claims
- 2648US11018024B2Method of fabricating embedded tracesNXP USA INC·Filed 2018·Granted May 25, 2021·0 cites·20 claims
- 2747US2016372339A1Semiconducitive catechol group encapsulant adhesion promoter for a packaged electronic deviceFREESCALE SEMICONDUCTOR INC·Filed 2016·Application pending·0 cites
- 2846US9385064B2Heat sink having a through-openingUEHLING TRENT S·Filed 2014·Granted Jul 5, 2016·0 cites·20 claims
- 2945US9659831B2Methods and structures for detecting low strength in an interlayer dielectric structureUEHLING TRENT S·Filed 2014·Granted May 23, 2017·0 cites·20 claims
- 3044US8994190B2Low-temperature flip chip die attachUEHLING TRENT S·Filed 2012·Granted Mar 31, 2015·0 cites·15 claims
- 3140US9070657B2Heat conductive substrate for integrated circuit packageFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Jun 30, 2015·0 cites·19 claims
- 3240US2013299947A1Passivated test structures to enable saw singulation of waferUEHLING TRENT S·Filed 2012·Application pending·0 cites
- 3336US2003006062A1Interconnect system and method of fabricationFiled 2001·Application pending·0 cites
- 3435US2002079595A1Apparatus for connecting a semiconductor die to a substrate and method thereforFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →