Inventor · disambiguated record
Michio Komoda
Also filed as: KOMODA MICHIO
22 granted patents·4 pending applications·185 citations·filing 1992–2008
95Inventor score
Top patents by PatentIndex Score
26 records- 0169US7479825B2Clock forming method for semiconductor integrated circuit and program product for the methodRENESAS TECH CORP·Filed 2006·Granted Jan 20, 2009·4 cites·5 claims
- 0266US6925624B2Circuit modification methodRENESAS TECH CORP·Filed 2001·Granted Aug 2, 2005·12 cites·18 claims
- 0359US6546537B1Wiring data generation method and wiring data generation apparatus allowing inconsistency between block internal line and block external linesMITSUBISHI ELECTRIC CORP·Filed 2000·Granted Apr 8, 2003·6 cites·22 claims
- 0457US7127385B2Delay time estimation method and recording medium storing estimation programRENESAS TECH CORP·Filed 2001·Granted Oct 24, 2006·6 cites·5 claims
- 0553US5515291AApparatus for calculating delay time in logic functional blocksMITSUBISHI ELECTRIC CORP·Filed 1992·Granted May 7, 1996·17 cites·5 claims
- 0653US2009043558A1Delay calculation method capable of calculating delay time with small margin of errorRENESAS TECH CORP·Filed 2008·Application pending·0 cites
- 0752US5473548AApparatus for computing power consumption of MOS transistor logic function blockMITSUBISHI ELECTRIC CORP·Filed 1993·Granted Dec 5, 1995·26 cites·12 claims
- 0851US7039573B2Method of formulating load model for glitch analysis and recording medium with the method recorded thereonRENESAS TECH CORP·Filed 2001·Granted May 2, 2006·2 cites·8 claims
- 0948US5444647AMultiplier circuit and division circuit with a round-off functionMITSUBISHI ELECTRIC CORP·Filed 1994·Granted Aug 22, 1995·16 cites·15 claims
- 1047US7496491B2Delay calculation method capable of calculating delay time with small margin of errorRENESAS TECH CORP·Filed 2005·Granted Feb 24, 2009·0 cites·5 claims
- 1147US5438524ALogic synthesizerMITSUBISHI ELECTRIC CORP·Filed 1993·Granted Aug 1, 1995·18 cites·15 claims
- 1244US6510404B1Gate delay calculation apparatus and method thereof using parameter expressing RC model source resistance valueMITSUBISHI ELECTRIC CORP·Filed 1997·Granted Jan 21, 2003·14 cites·6 claims
- 1344US2002156610A1Gate delay calculation apparatus and method thereof using parameter expressing RC model source resistance valueMITSUBISHI ELECTRIC CORP·Filed 2002·Application pending·0 cites
- 1443US6073265APipeline circuit with a test circuit with small circuit scale and an automatic test pattern generating method for testing the sameMITSUBISHI ELECTRIC CORP·Filed 1998·Granted Jun 6, 2000·10 cites·19 claims
- 1542US6000050AMethod for minimizing ground bounce during DC parametric tests using boundary scan registerSYNOPSYS INC·Filed 1997·Granted Dec 7, 1999·10 cites·36 claims
- 1641US6678849B1Semiconductor integrated circuit and test pattern generation method thereforMITSUBISHI ELECTRIC CORP·Filed 1999·Granted Jan 13, 2004·9 cites·8 claims
- 1741US5379232ALogic simulatorMITSUBISHI ELECTRIC CORP·Filed 1992·Granted Jan 3, 1995·13 cites·10 claims
- 1840US6552551B2Method of producing load for delay time calculation and recording mediumMITSUBISHI ELECTRIC CORP·Filed 2001·Granted Apr 22, 2003·2 cites·4 claims
- 1938US2003098870A1Linear Filter circuitFiled 2002·Application pending·0 cites
- 2038US2006043427A1Automatic-arrangement-wiring apparatus for and program for performing layout of integrated circuitRENESAS TECH CORP·Filed 2005·Application pending·0 cites
- 2137US5541861ALogic simulatorMITSUBISHI ELECTRIC CORP·Filed 1994·Granted Jul 30, 1996·10 cites·12 claims
- 2233US5729126AMaster slice LSI with integrated fault detection circuitryMITSUBISHI ELECTRIC CORP·Filed 1996·Granted Mar 17, 1998·2 cites·23 claims
- 2332US6076178ATest circuit and method for DC testing LSI capable of preventing simultaneous change of signalsMITSUBISHI ELECTRIC CORP·Filed 1998·Granted Jun 13, 2000·3 cites·8 claims
- 2431US5619440AMultiplier circuit with rounding-off functionMITSUBISHI ELECTRIC CORP·Filed 1995·Granted Apr 8, 1997·3 cites·12 claims
- 2530US6292043B1Semiconductor integrated circuit deviceMITSUBISHI ELECTRIC CORP·Filed 1999·Granted Sep 18, 2001·2 cites·6 claims
- 2620US5347178ACMOS semiconductor logic circuit with multiple input gatesMITSUBISHI DENKI KAISHA KITAIT·Filed 1993·Granted Sep 13, 1994·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →