Inventor · disambiguated record
Mahesh Kumashikar
Also filed as: KUMASHIKAR MAHESH · KUMASHIKAR MAHESH K · KUMASHIKAR MAHESH KRISHNAPPAYYA
27 granted patents·37 pending applications·15 citations·filing 2006–2025
92Inventor score
Top patents by PatentIndex Score
64 records- 0194US10795853B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2017·Granted Oct 6, 2020·9 cites·24 claims
- 0292US12353238B2Flexible instruction set architecture supporting varying frequenciesINTEL CORP·Filed 2021·Granted Jul 8, 2025·2 cites·22 claims
- 0391US11586579B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2021·Granted Feb 21, 2023·2 cites·24 claims
- 0488US12334449B2Selective use of different advanced interface bus with electronic chipsINTEL CORP·Filed 2020·Granted Jun 17, 2025·2 cites·20 claims
- 0579US2025286555A1Power Management using Voltage Islands on Programmable Logic DevicesALTERA CORP·Filed 2025·Application pending·0 cites
- 0678US2025315079A1Flexible Instruction Set Architecture Supporting Varying FrequenciesALTERA CORP·Filed 2025·Application pending·0 cites
- 0777US2025271826A1Systems and methods to reduce voltage guardbandALTERA CORP·Filed 2025·Application pending·0 cites
- 0876US11899615B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2023·Granted Feb 13, 2024·0 cites·24 claims
- 0975US12379698B2Systems and methods to reduce voltage guardbandINTEL CORP·Filed 2021·Granted Aug 5, 2025·0 cites·21 claims
- 1073US12436912B2Disaggregated die with input/output (I/O) tilesINTEL CORP·Filed 2024·Granted Oct 7, 2025·0 cites·13 claims
- 1172US2025285985A1Selective use of different advanced interface bus with electronic chipsALTERA CORP·Filed 2025·Application pending·0 cites
- 1270US11757434B2High performance fast Mux-D scan flip-flopINTEL CORP·Filed 2022·Granted Sep 12, 2023·0 cites·17 claims
- 1369US12487658B2Workload-dependent integrated circuit operation based on power headroomINTEL CORP·Filed 2021·Granted Dec 2, 2025·0 cites·20 claims
- 1469US12355359B2Switch based on load currentINTEL CORP·Filed 2021·Granted Jul 8, 2025·0 cites·20 claims
- 1568US12429900B2Controlled transition between configuration mode and user mode to reduce current-resistance voltage dropINTEL CORP·Filed 2021·Granted Sep 30, 2025·0 cites·20 claims
- 1667US12341511B2Power management using voltage islands on programmable logic devicesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·20 claims
- 1765US11294852B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2020·Granted Apr 5, 2022·0 cites·25 claims
- 1861US12481345B2Techniques for power management in compute circuitsINTEL CORP·Filed 2022·Granted Nov 25, 2025·0 cites·20 claims
- 1961US2024321716A1Electronic Devices Having Oval Power Delivery PadsALTERA CORP·Filed 2024·Application pending·0 cites
- 2061US2024312905A1Techniques For Providing Supply Current To Dies In A System Using An InductorALTERA CORP·Filed 2024·Application pending·0 cites
- 2159US12437135B2Dynamic loadlines for programmable fabric devicesINTEL CORP·Filed 2021·Granted Oct 7, 2025·0 cites·20 claims
- 2259US12422477B2Segmented row repair for programmable logic devicesINTEL CORP·Filed 2021·Granted Sep 23, 2025·0 cites·20 claims
- 2359US11296681B2High performance fast Mux-D scan flip-flopINTEL CORP·Filed 2019·Granted Apr 5, 2022·0 cites·20 claims
- 2459US2024113014A1Techniques For Shifting Signal Transmission To Compensate For Defects In Pads In Integrated CircuitsALTERA CORP·Filed 2023·Application pending·0 cites
- 2559US2024120302A1Techniques For Arranging Conductive Pads In Electronic DevicesINTEL CORP·Filed 2023·Application pending·0 cites
- 2658US12273107B2Dynamically scalable timing and power models for programmable logic devicesINTEL CORP·Filed 2021·Granted Apr 8, 2025·0 cites·20 claims
- 2758US2024321670A1Techniques For Transferring Heat From Electronic Devices Using HeatsinksALTERA CORP·Filed 2024·Application pending·0 cites
- 2857US12007929B2Low-latency optical connection for CXL for a server CPUINTEL CORP·Filed 2020·Granted Jun 11, 2024·0 cites·22 claims
- 2957US2023342309A1Circuit Systems And Methods For Transmitting Signals Between DevicesINTEL CORP·Filed 2023·Application pending·0 cites
- 3057US2023334212A1Systems And Methods For Selecting Decoupling Capacitance Using A Power Jumper CircuitINTEL CORP·Filed 2023·Application pending·0 cites
- 3157US2024145434A1Multi programable-die moduleINTEL CORP·Filed 2023·Application pending·0 cites
- 3257US2024096810A1Systems And Methods For Coupling Integrated Circuit DiesINTEL CORP·Filed 2023·Application pending·0 cites
- 3356US2021263880A1Disaggregated die with input/output (i/o) tilesINTEL CORP·Filed 2020·Application pending·0 cites
- 3455US12431899B2Self-gating flops for dynamic power reductionINTEL CORP·Filed 2021·Granted Sep 30, 2025·0 cites·13 claims
- 3555US12321714B2Compressed wallace trees in FMA circuitsINTEL CORP·Filed 2021·Granted Jun 3, 2025·0 cites·21 claims
- 3653US2023028475A1Package io escape routing on a disaggregated shorelineNALAMALPU ANKIREDDY·Filed 2022·Application pending·0 cites
- 3753US2023024662A1Die-to-Die Power DeliveryNALAMALPU ANKIREDDY·Filed 2022·Application pending·0 cites
- 3852US12038858B2Processor package with universal optical input/outputINTEL CORP·Filed 2020·Granted Jul 16, 2024·0 cites·22 claims
- 3952US11734174B2Low overhead, high bandwidth re-configurable interconnect apparatus and methodINTEL CORP·Filed 2019·Granted Aug 22, 2023·0 cites·19 claims
- 4052US2022334983A1Techniques For Sharing Memory Interface Circuits Between Integrated Circuit DiesINTEL CORP·Filed 2022·Application pending·0 cites
- 4151US2022336415A1Grid-based interconnect system for modular integrated circuit systemsTANG LAI GUAN·Filed 2022·Application pending·0 cites
- 4251US2022337251A1Systems and methods for modular disaggregated integrated circuit systemsNALAMALPU ANKIREDDY·Filed 2022·Application pending·0 cites
- 4351US2024111703A1Techniques For Configuring Repeater Circuits In Active Interconnection DevicesALTERA CORP·Filed 2023·Application pending·0 cites
- 4450US12294368B2Three-dimensional stacked programmable logic fabric and processor design architectureINTEL CORP·Filed 2021·Granted May 6, 2025·0 cites·20 claims
- 4550US11983135B2Electrical and optical interfaces at different heights along an edge of a package to increase bandwidth along the edgeINTEL CORP·Filed 2020·Granted May 14, 2024·0 cites·20 claims
- 4650US2024346224A1Signal transfer with a bridge and hybrid bumpsKUMASHIKAR MAHESH K·Filed 2024·Application pending·0 cites
- 4750US2023341463A1Architecture and Testing for an Integrated Circuit PackageKANTIPUDI KALYANA RAVINDRA·Filed 2023·Application pending·0 cites
- 4849US9552308B2Early wake-warn for clock gating controlINTEL CORP·Filed 2013·Granted Jan 24, 2017·0 cites·26 claims
- 4949US2023018793A1Programmable Input And Output Interfaces In Processing Integrated Circuits For Servers And Other DevicesINTEL CORP·Filed 2022·Application pending·0 cites
- 5049US2023035058A1Techniques For Booting A Compute Integrated Circuit Using A Boot Management Controller In A Processing Integrated CircuitINTEL CORP·Filed 2022·Application pending·0 cites
Showing the top 50 of 64 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →